ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 132
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ADAU1373BCBZ-RL
Manufacturer Part Number
ADAU1373BCBZ-RL
Description
Low Power Codec with Speaker and Headphone Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
1.ADAU1373BCBZ-RL.pdf
(296 pages)
- Current page: 132 of 296
- Download datasheet (9Mb)
ADAU1373
DPLLA_CTRL REGISTER
Address: 0x28, Reset: 0x00, Name: DPLLA_CTRL
DPLLA Control
Table 74. Bit Descriptions for DPLLA_CTRL
Bits
[7:4]
Bit Name
DPLLA_REF_SEL
Settings
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1110
1111
1101
1100
Description
DPLLA Source Select. DPLLA source selection can be set to one of the
following: Digital Audio Interface A/B/C bit clock/frame clock or
GPIO1/2/3/4 or Master Clock Input 1/2.
MCLK1
DPLLA reference clock input: Digital Audio Interface A bit clock
DPLLA reference clock input: Digital Audio Interface B bit clock
DPLLA reference clock input: Digital Audio Interface C bit clock
DPLLA reference clock input: Digital Audio Interface A frame clock
DPLLA reference clock input: Digital Audio Interface B frame clock
DPLLA reference clock input: Digital Audio Interface C frame clock
DPLLA reference clock input: GPIO1
DPLLA reference clock input: GPIO2
DPLLA reference clock input: GPIO3
DPLLA reference clock input: GPIO4
MCLK2
Reserved
Reserved
Reserved
Reserved
Rev. 0 | Page 132 of 296
Reset
0x0
Access
RW
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