PIC18F1230 MICROCHIP [Microchip Technology], PIC18F1230 Datasheet - Page 181

• Manufacturer Part Number: PIC18F1230
• Description: 18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

18.0
PIC18F1230/1330 devices have a Low-Voltage
Detect module (LVD). This is a programmable circuit
that allows the user to specify the device voltage trip
point. If the device experiences an excursion past the
trip point, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the
interrupt vector address and the software can then
respond to the interrupt.
REGISTER 18-1:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
Note 1:
U-0
—
LOW-VOLTAGE DETECT (LVD)
See Table 22-4 in Section 22.0 “Electrical Characteristics” for the specifications.
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
LVDEN: Low-Voltage Detect Power Enable bit
1 = LVD enabled
0 = LVD disabled
LVDL3:LVDL0: Voltage Detection Limit bits
1111 = Reserved
1110 = Maximum setting
.
.
.
0000 = Minimum setting
trip point
trip point and the LVD interrupt should not be enabled
U-0
—
LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
Advance Information
LVDEN
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
LVDL3
R/W-0
The Low-Voltage Detect Control register (Register 18-1)
completely controls the operation of the LVD module.
This allows the circuitry to be “turned off” by the user
under software control, which minimizes the current
consumption for the device.
The block diagram for the LVD module is shown in
Figure 18-1.
(1)
PIC18F1230/1330
LVDL2
R/W-1
(1)
x = Bit is unknown
LVDL1
R/W-0
(1)
DS39758B-page 179
LVDL0
R/W-1
(1)
bit 0