DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 70
DP83256VF-AP
Manufacturer Part Number
DP83256VF-AP
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.DP83256VF-AP.pdf
(144 pages)
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D0 –D7
5 0 Registers
5 26 CURRENT INJECTION COUNT REGISTER (CIJCR)
The Current Injection Count Register takes a snap-shot of the Injection Counter during every Control Bus Interface read cycle of
this register
During a Control Bus Interface write cycle the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register
(ICR) will be set to 1 and will ignore a write cycle
The Injection Counter is an 8-bit down-counter which decrements every 80 ns
The counter is active only during One Shot or Periodic Injection Modes (i e Injection Control
Current Transmit State Register (CTSR) are set to either 01 or 10)
The Injection Threshold Register (IJTR) value is loaded into the Injection Counter when the counter reaches zero and during
every Control Bus Interface write cycle of IJTR
The counter is initialized to 0 during the reset process (i e E RST
ACCESS RULES
Bit
IJC7
ADDRESS
D7
19h
IJC0 –IJC7
Symbol
IJC6
D6
INJECTION COUNT BIT
IJC0 is the Least Significant Bit (LSB)
(Continued)
Always
READ
IJC5
D5
Write Reject
IJC4
WRITE
D4
k
0-7
l
Current value of the Injection Counter
IJC3
D3
70
e
GND)
Description
IJC2
D2
IJC1
D1
k
1 0
IJC0
D0
l
bits (IC
k
1 0
l
) of the
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