DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 123
DP83256VF-AP
Manufacturer Part Number
DP83256VF-AP
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.DP83256VF-AP.pdf
(144 pages)
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7 0 Electrical Characteristics
AC Characteristics for the PMD Interface Inputs (ANSI Specifications)
The following input signals are covered PMD Indicate Data (PMID) Receive Data In (RXD IN) Receive Clock In (RXC IN)
Note The Alternate PMD Interface is only available on the 160 pin DP83257 PLAYER
enabled by the CGMREG TXCE bit The rest of the Alternate PMD Interface is enabled by the APMDREG APMDEN bit
All comments in square brackets are section references to the ANSI documents where these specifications can be found
Symbol
T53
T54
T55
T56
CRM Window Recognition Region
(PMID Inputs)
PMID Receive Clock Tolerance
(Lock Acquisition Range)
Receive Clock Acquisition Time
Receive Clock Acquisition Time
FIGURE 7-13 Alternate PMD Input Timing Diagrams ANSI Specifications
Parameter
(Continued)
From 1st Data
and SD Active
From Line State
Change
PMD E 2
PHY 5 2 4
PHY 5 2 6
PHY 5 2 6
Conditions
123
a
Device and the 100 pin DP83256-AP Device The Transmit Clock is
b
Min
b
100
3
Typ
TL F 11708– 55
TL F 11708 – 54
Max
100
100
15
3
Units
ppm
ns
s
s
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