DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 30
DP83256VF-AP
Manufacturer Part Number
DP83256VF-AP
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.DP83256VF-AP.pdf
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3 0 Functional Description
INTERFACE ACTIVATION
The Primary PMD Interface is always enabled
The Alternate PMD Interface is enabled by programming a
PLAYER
the APMDEN bit in the APMDREG register The interface is
off by default and should be left that way unless it is being
used
It will also probably be necessary to enable the Transmit
Clocks when using the Alternate PMD Interface The Trans-
mit Clocks (TXC) are enabled by writing a 1 to the TXCE bit
a
register bit To enable the interface write a 1 to
(Continued)
30
in the CGMREG register The transmit clocks are disabled
by default and should be left that way unless it is being
used
Note that when the Alternate PMD Interface is active the
Primary PMD Interface can not be used without the Alter-
nate PMD Interface connections Also note that the Long
Internal Loopback (LILB) can not be used when the Alter-
nate PMD Interface is activated
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