AMD-X5-133ADW AMD [Advanced Micro Devices], AMD-X5-133ADW Datasheet - Page 56

• Manufacturer Part Number: AMD-X5-133ADW
• Manufacturer: AMD [Advanced Micro Devices]

56
10
The Am5
methods for identifying the CPU in a system. The re-
ported values are assigned based on the RESET status
of the WB/WT pin input (Low = write-through; High =
write-back).
10.1 DX Register at RESET
The DX register always contains a component identifier
at the conclusion of RESET. The upper byte of DX (DH)
contains 04 and the lower byte of DX (DL) contains a
CPU type/stepping identifier (see Table 19).
10.2 CPUID Instruction
The Am5
CPUID instruction that makes information available to
software about the family, model and stepping of the
microprocessor on which it is executing. Support of this
instruction is indicated by the presence of a user-mod-
ifiable bit in position EFLAGS.21, referred to as the
EFLAGS.ID bit. This bit is reset to zero at device reset
(RESET or SRESET) for compatibility with existing pro-
cessor designs.
10.2.1 CPUID Timing
CPUID execution timing depends on the selected EAX
parameter values (see Table 20).
10.2.2 CPUID Operation
The CPUID instruction requires the user to pass an input
parameter to the CPU in the EAX register. The CPU
response is returned to the user in registers EAX, EBX,
ECX, and EDX.
Write-through mode
Write-back mode
0F A2 CPUID
Code
CLKMUL Setting/Cache mode
OP
AMD
Table 20. CPUID Instruction Description
Am5
Instruction
X
X
86 microprocessor supports two standard
86 microprocessor family implements the
X
Table 19. CPU ID Codes
86 CPU IDENTIFICATION
Value
Input
EAX
>1
0
1
Clocks
Core
CPU
41
14
9
Component
ID (DH)
04
04
AMD string
CPU ID Register
null registers
Description
Am5
Revision
ID (DL)
Ex
Fx
X
PRELIMINARY
86 Microprocessor
When the parameter passed in EAX is zero, the register
values returned upon instruction execution are:
The values in EBX, ECX, and EDX indicate an AMD
microprocessor. When taken in the proper order:
they decode to
When the parameter passed in EAX is 1, the register
values returned are:
The value returned in EAX after CPUID instruction ex-
ecution is identical to the value loaded into EDX upon
device reset. Software must avoid any dependency
upon the state of reserved processor bits.
When the parameter passed in EAX is greater than one,
register values returned upon instruction execution are:
EAX[3:0]
EAX[7:4]
EAX[11:8]
EAX[15:12]
EAX[31:16]
EBX[31:0]
ECX[31:0]
EDX[31:0]
Note:
*Please contact AMD at [phone]
for stepping ID details.
EBX (least significant bit to most significant bit)
EDX (least significant bit to most significant bit)
ECX (least significant bit to most significant bit)
AuthenticAMD
EAX[31:0]
EBX[31:0]
ECX[31:0]
EDX[31:0]
Flags affected: No flags are affected.
Exceptions: None
EAX[31:0]
EBX[31:0]
ECX[31:0]
EDX[31:0]
Stepping ID*
model:
Am5
Family
486 Instruction Set = 4h
0000
RESERVED
00000000h
00000000h
00000001h = all versions
The 1 in bit 0 indicates that the FPU
is present
Write-through mode = Eh
Write-back mode = Fh
X
86 CPU:
444D4163h
69746E65h
00000001h
68747541h
00000000h
00000000h
00000000h
00000000h