AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 297

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
Table 63. RESET and Configuration Signals for 66-MHz Bus Operation
Notes:
1. BF[2:0] must meet a minimum setup time of 1.0 ms and a minimum hold time of two clocks relative to the negation of RESET.
2. To be sampled on a specific clock edge, setup and hold times must be met the clock edge before the clock edge on which RESET
3. If asserted asynchronously, these signals must meet a minimum setup and hold time of two clocks relative to the negation of
Chapter 15
Symbol
is sampled negated.
RESET.
t
t
t
t
t
t
100
102
101
t
t
t
t
t
t
t
94
95
99
90
91
92
93
96
97
98
1
1
2
3
2
3
Parameter Description
RESET Setup Time
RESET Hold Time
RESET Pulse Width, V
RESET Active After V
BF[2:0] Setup Time
BF[2:0] Hold Time
intentionally left blank
intentionally left blank
intentionally left blank
FLUSH# Setup Time
FLUSH# Hold Time
FLUSH# Setup Time
FLUSH# Hold Time
CC
CC
and CLK Stable
and CLK Stable
Signal Switching Characteristics
15 clocks
2 clocks
2 clocks
2 clocks
1.0 ms
1.0 ms
5.0 ns
1.0 ns
5.0 ns
1.0 ns
AMD-K6™-2E Processor Data Sheet
Preliminary Data
Min
Max
Figure
94
94
94
94
94
94
94
94
94
94
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