AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 229

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
9.4
Chapter 9
Examples
Suppose that the range of memory from 16 Mbytes to 32 Mbytes
is uncacheable, and the 8-Mbyte range of memory on top of 1
Gbyte is writ e-com binable . Range 0 is def ined as t he
uncacheable range, and range 1 is defined as the write-
combining range.
Extracting the 15 most-significant bits of the 32-bit physical
base address that corresponds to 16 Mbytes (0100_0000h)
yields
000_0000_1000_0000b. Because the uncacheable range size
is 16 Mbytes, the physical mask value 0 field is
111_1111_1000_0000b, according to Table 39. Bit 1 of the
UWCCR register (WC0) is cleared to 0 and bit 0 of the
UWCCR register is set to 1 (UC0).
Extracting the 15 most-significant bits of the 32-bit physical
base address that corresponds to 1 Gbyte (4000_0000h)
yields
010_0000_0000_0000b. Because the write-combining range
size is 8 Mbytes, the physical mask value 1 field is
111_1111_1100_0000b, according to Table 39. Bit 33 of the
UWCCR register (WC1) is set to 1 and bit 32 of the UWCCR
register is cleared to 0 (UC1).
a
a
Write Merge Buffer
physical
physical
base
base
AMD-K6™-2E Processor Data Sheet
address
address
0
1
field
field
211
of
of