AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 184
AMD-K6-2E/400AFR
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AMD-K6-2E/400AFR
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AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6-2E400AFR.pdf
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AMD-K6™-2E Processor Data Sheet
Locked Operation
with BOFF#
Intervention
166
Figure 67 on page 167 shows BOFF# asserted within a locked
read-write pair of bus cycles. In this example, the processor
asserts LOCK# with ADS# to drive a locked memory read cycle
followed by a locked memory write cycle. During the locked
memory write cycle in this example, the processor samples
BOFF# asserted. The processor immediately aborts the locked
memory write cycle and floats all its bus-driving signals,
including LOCK#. The system logic or another bus master can
initiate an inquire cycle or drive a new bus cycle one clock edge
after the clock edge on which BOFF# is sampled asserted. If the
system logic drives a BOFF#-initiated inquire cycle and hits a
modified line, the processor performs a writeback cycle before
it restarts the locked cycle (the processor asserts LOCK# during
the writeback cycle).
In Figure 67, the processor immediately restarts the aborted
locked write cycle by driving the bus off the clock edge on
which BOFF# is sampled negated. The system logic must ensure
the processor results for interrupted and uninterrupted locked
cycles are consistent. That is, the system logic must guarantee
the memory accessed by the processor is not modified during
the time another bus master controls the bus.
Preliminary Information
Bus Cycles
22529B/0—January 2000
Chapter 6
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