MC68020 Motorola, MC68020 Datasheet - Page 258

• Manufacturer Part Number: MC68020
• Description: (MC68020 / MC68EC020) MICROPROCESSORS USERS MANUAL
• Manufacturer: Motorola

PAL16L8
FPCP CS GENERATION CIRCUITRY FOR 25 MHz OPERATION
MOTOROLA INC., AUSTIN, TEXAS
INPUTS:
OUTPUTS:
!~CS
CLKD = CLK
9-4
Description: There are three terms to the CS generation. The first term denotes the earliest time CS can be asserted.
The second term is used to assert CS until the end of the FPCP access. The third term is to ensure that no race
condition occurs in case of a late AS .
DSACK1/DSACK0
START
CLK
~CS
= FC2
*!A19
*!A15
*!CLK
+FC2
*!A19
*!A15
*!~AS
+FC2
*!A19
*!A15
*CLKD
CLK
AS
CS
~AS
CLKD
FC2
9
*FC1
*!A18
*!A14
*FC1
*!A18
*!A14
*FC1
*!A18
*!A14
Figure 9-3. Chip Select PAL Equations
Figure 9-4. Bus Cycle Timing Diagram
FC1
19
FPCP SPECIFICATION
M68020 USER’S MANUAL
FC0
*FC0
*A17
*A13
*FC0
*A17
*A13
*FC0
*A17
*A13
A19
47A
A18
A17
*!A16
*!A16
*!A16
A16
;cpu space = $7
;coprocessor access = $2
;qualified by MPU clock low
;coprocessor id = $1
;cpu space = $7
;coprocessor access = $2
;coprocessor id = $1
;qualified by address strobe low
;cpu space = $7
;coprocessor access = $2
;coprocessor id = $1
;qualified by CLKD (delayed CLK)
A15
8
A14
MPU SPECIFICATION
A13
MOTOROLA