MC68020 Motorola, MC68020 Datasheet - Page 222

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MC68020

Manufacturer Part Number
MC68020
Description
(MC68020 / MC68EC020) MICROPROCESSORS USERS MANUAL
Manufacturer
Motorola
Datasheet

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Figure 8-6 shows the same instruction stream executing with four clocks for every read
and write. The idle bus cycles coincide with the wait states of the memory access;
therefore, the total execution time is only 13 clocks.
Examples 1–4 demonstrate the complexity of instruction timing calculation for the
MC68020/EC020. It is impossible to anticipate individual instruction timing as an absolute
number of clock cycles due to the dependency of overlap on the instruction sequence and
alignment as well as the number of wait states in memory. This can be seen by comparing
individual and composite time for Figures 8-3 through 8-6. These instruction timings are
compared in Table 8-1, where timing varies for each instruction as the context varies.
8-8
#1) MOVE.L
#2) ADD.L
#3) MOVE.L
#4) ADD.L
Total Clock Cycles
Instruction
EXECUTION TIME
Table 8-1. Examples 1–4 Instruction Stream Execution Comparison
INSTRUCTION
CONTROLLER
SEQUENCER
COUNTER
ACTIVITY
D4,(A1)+
D4,D5
(A1),–(A2)
D5,D6
CLOCK
CLOCK
BUS
BUS
LEGEND:
1
IDLE
Figure 8-6. Processor Activity for Example 4
PERFORM
MOVE #1
(Odd Alignment)
2
1) MOVE.L D4,(A1)+
MOVE.L D4,(A1)+
2) ADD.L D4,D5
3) MOVE.L (A1),–(A2)
4) ADD.L D5,D6
Example 1
WRITE TO (A1)+
3
(5)
16
PERFORM
6
0
9
1
WRITE
ADD #2
M68020 USER’S MANUAL
4
5
CALCULATE
SOURCE EA
MOVE #3
(Even Alignment)
6
Example 2
READ FROM (A1)
16
7
DESTINATION
4
3
6
3
CALCULATE
MOVE #3
READ
EA
8
MOVE.L (A1),–(A2)
9
IDLE
(8)
10
Example 3
PERFORM
(Cache)
MOVE #3
12
4
0
7
1
WRITE TO –(A2)
11
WRITE
12
PERFORM
ADD #4
13
(Cache with
Wait States)
Example 4
14
MOTOROLA
13
5
0
8
0

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