MC68020 Motorola, MC68020 Datasheet - Page 120
MC68020
Manufacturer Part Number
MC68020
Description
(MC68020 / MC68EC020) MICROPROCESSORS USERS MANUAL
Manufacturer
Motorola
Datasheet
1.MC68020.pdf
(306 pages)
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5.7.2.3 BUS ARBITRATION CONTROL (MC68EC020). The bus arbitration control unit in
the MC68EC020 is implemented with a finite state machine. As discussed previously, all
asynchronous inputs to the MC68EC020 are internally synchronized in a maximum of two
cycles of the processor clock.
As shown in Figure 5-48, the input signal labeled R is an internally synchronized version
of the BR signal. The BG output is labeled G, and the internal high-impedance control
signal is labeled T. If T is true, the address, data, and control buses are placed in the high-
impedance state after the next rising edge following the negation of AS and RMC. All
signals are shown in positive logic (active high), regardless of their true active voltage
level.
MOTOROLA
Figure 5-48. MC68EC020 Bus Arbitration State Diagram
R—BUS REQUEST
G—BUS GRANT
T —THREE-STATE CONTROL TO BUS CONTROL LOGIC
X—DON'T CARE
X
STATE1
GT
STATE 2
R
GT
R
M68020 USER’S MANUAL
R
STATE 3
STATE 6
STATE 0
GT
GT
R
GT
R
R
X
R
X
STATE 5
STATE 4
GT
GT
R
5- 73
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