MC68020 Motorola, MC68020 Datasheet - Page 244

• Manufacturer Part Number: MC68020
• Description: (MC68020 / MC68EC020) MICROPROCESSORS USERS MANUAL
• Manufacturer: Motorola

8.2.8 Arithmetic/Logical Instructions
The arithmetic/logical instructions table indicates the number of clock periods needed for
the processor to perform the specified arithmetic/logical operation using the specified
addressing mode. It also includes, in worst case, the amount of time needed to prefetch
the next instruction. Footnotes specify when to add either fetch address or fetch
immediate effective address time. This sum gives the total effective execution time for the
operation using the specified addressing mode. The total number of clock cycles is
outside the parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
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8-30
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*
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Add Fetch Effective Address Time
Add Fetch Immediate Address Time
ADD
ADDA
ADD
AND
AND
EOR
EOR
OR
OR
SUB
SUBA
SUB
CMP
CMPA
CMP2
MUL.W
MUL.L
DIVU.W
DIVU.L
DIVS.W
DIVS.L
Instruction
EA,Dn
EA,An
Dn,EA
EA,Dn
Dn,EA
Dn,Dn
Dn,Mem
EA,Dn
Dn,EA
EA,Dn
Dn,EA
EA,Dn
EA,An
EA,Rn
EA,Dn
EA,Dn
EA,Dn
EA,Dn
EA,Dn
EA,Dn
EA,An
M68020 USER’S MANUAL
Best Case
16(1/0/0)
25(0/0/0)
41(0/0/0)
42(0/0/0)
76(0/0/0)
54(0/0/0)
88(0/0/0)
0(0/0/0)
0(0/0/0)
3(0/0/1)
0(0/0/0)
3(0/0/1)
0(0/0/0)
3(0/0/1)
0(0/0/0)
3(0/0/1)
0(0/0/0)
0(0/0/0)
3(0/0/1)
0(0/0/0)
1(0/0/0)
Cache Case
18(1/0/0)
27(0/0/0)
43(0/0/0)
44(0/0/0)
78(0/0/0)
56(0/0/0)
90(0/0/0)
2(0/0/0)
2(0/0/0)
4(0/0/1)
2(0/0/0)
4(0/0/1)
2(0/0/0)
4(0/0/1)
2(0/0/0)
4(0/0/1)
2(0/0/0)
2(0/0/0)
4(0/0/1)
2(0/0/0)
4(0/0/0)
Worst Case
18(1/1/0)
28(0/1/0)
44(0/1/0)
44(0/1/0)
79(0/1/0)
57(0/1/0)
91(0/1/0)
3(0/1/0)
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
3(0/1/0)
3(0/1/0)
6(0/1/1)
3(0/1/0)
4(0/1/0)
MOTOROLA