cx25840 Conexant Systems, Inc., cx25840 Datasheet - Page 28

• Manufacturer Part Number: cx25840
• Description: Video Decoder And Broadcast Audio
• Manufacturer: Conexant Systems, Inc.

Detailed Functional Description
3-2
The AFE receives eight video inputs that are multiplexed to produce inputs for the
three analog channels: CH1, CH2, or CH3. Each analog channel has a variable gain
amplifier and anti-alias filter that can be independently configured. The CH1 signal is
routed through ADC1, while CH2 and CH3 can be statically shared or time-
multiplexed on Miscellaneous Chip Control.
After the input mux, the video signal is clamped to the midpoint of the single-to-
differential amplifier for DC restoration. Next, the signal is converted from single-
ended to differential, and then amplified or attenuated through the two gain stages.
The gain settings for the VGA come from the video decoder feedback loop, although
this can be disabled and a manual gain value set instead.
The output of the VGA is then low-pass filtered prior to the ADC to prevent high-
frequency noise near the sampling frequency from being aliased back onto the signal
by the sampling process. The bandwidth of the anti-alias filter is programmable for
either 8 MHz, half this bandwidth, or completely bypassed.
ADC1 then samples the DC-restored and gained differential video waveform using
the external crystal frequency. Miscellaneous Chip Control also samples its
differential inputs at the crystal frequency, but the video input can be enabled to time
multiplex between the CH{2} and CH{3} inputs. An internal mux switches between
the two channels fast enough to support the sampling of the Pb and Pr chroma signals
of an interlaced component video input through one ADC.
The clock for the video decoder’s digital domain comes from a fractional PLL that
converts the crystal frequency to a clock that is a multiple of the video pixel rate. For
example, in ITU-R BT.656 mode, the internal clock runs at 8 times the 13.5 MHz
pixel rate, 108 MHz. The digital logic adjusts the frequency in small increments to
track the field rate of the decoded video signal, producing a video-locked clock.
Additionally, a second PLL output, AUX_CLK, is provided and can be used as a
video-locked oversample audio clock reference for any external audio components.
This clock would usually be programmed to be either 384 or 256 times the audio
sample rate, but may be any desired multiple of the audio sample rate. The PLL can
also be used as a general clock source, unlocked to the video input and programmable
to any arbitrary frequency.
A bandgap design is used as an internal voltage reference generator. Its output is
connected to a pin for external filtering. Another circuit converts this bandgap
reference voltage to a precision current reference. This circuit relies upon an external
high-precision resistor connected to the IREF pin to generate this current.
Conexant
CX25840/1/2/3 Data Sheet
102284B
8/3/05