k4j55323qf-gc Samsung Semiconductor, Inc., k4j55323qf-gc Datasheet - Page 39

• Manufacturer Part Number: k4j55323qf-gc
• Description: 256mbit Gddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

K4J55323QF-GC
TRUTH TABLE - Clock Enable (CKE)
NOTES :
1. CKEn is the logic state of CKE at clock edge n; CKEn-1was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR2(x32) immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn
4. All state and sequence not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the t
CKEn-1
H
L
L
CKEn
H
L
L
CURRENT STATE
Bank(s) Active
All Banks Idle
All Banks Idle
Power-Down
Power-Down
Self Refresh
Self Refresh
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
COMMANDn
- 39 -
X
X
Precharge Power-Down Entry
Active Power-Down Entry
Maintain Power-Down
Maintain Self Refresh
Self Refresh Entry
Exit Power-Down
Exit Self Refresh
256M GDDR3 SDRAM
ACTIONn
XSA
Rev 1.7 (Jan. 2005)
period.
NOTES
5