k4j55323qf-gc Samsung Semiconductor, Inc., k4j55323qf-gc Datasheet - Page 29

• Manufacturer Part Number: k4j55323qf-gc
• Description: 256mbit Gddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

K4J55323QF-GC
READ to WRITE
READ to WRITE
COMMAND
Termination
ADDRESS
DQ
WDQS
RDQS
/CK
DM
DQ
NOTE
CK
:
1. DO n = data-out from column n.
2. DI b = data-in from column b.
3. Burst length = 4
4. One subsequent element of data-out appears in the programmed order following DO n.
5. Data-in elements are applied following DI b in the programmed order.
6. Shown with nominal t
7. t
8. RDQS will start driving high one half-clock cycle prior to the first falling edge of RDQS.
9. The gap between data termination enable to the first data-in should be greater than 1tCK
READ
Bank
Col n
T0
DQSS
in nominal case.
NOP
T7
CL = 8
AC
and t
DQSQ.
Bank a,
WRITE
Col b
T8
DO
n
DQ Termination Disabled
T8n
- 29 -
NOP
T9
t
DON’T CARE
WL
= 4
T9n
NOP
T10
256M GDDR3 SDRAM
TRANSITIONING DATA
NOP
T11
Rev 1.7 (Jan. 2005)
DQ Termination Enbaled
1tCK <
NOP
T12
DI
b
T12n