em78p510nso32j/s ELAN Microelectronics Corp, em78p510nso32j/s Datasheet - Page 39

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em78p510nso32j/s

Manufacturer Part Number
em78p510nso32j/s
Description
8-bit Microprocessor With Otp Rom
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.1) 01.25.2008
(This specification is subject to change without further notice)
6.2.54 Bank 4 RB PIOCR(Port B I/O Control Register)
Bits 7~0 (IOCB7~IOCB0): Port B 8-Bit I/O Direction Control Registers
6.2.55 Bank 4 RC PIOCR (Port C I/O Control Register)
Bits 7~4: Reserved
Bits 3~0 (IOCC3~IOCC0): Port C 4-Bit I/O Direction Control Registers
6.2.56 Bank 4 RF WKCR (Wake-up Control Register)
Bits 7~0 (INTWK7~INTWK0): External Interrupt 7~0 Wake-up Function Enable Bit
6.2.57 Bank 5 R6 UARC2 (UART Control Register 2)
Bits 7~6: Reserved
Bit 5 (UARTE): UART Function Enable
Bit 4:
Bit 3 (UINVEN): Enable UART TX and Rx Port Inverse Output
Bits 2~0: Reserved
INTWK7
IOCB7
Bit 7
Bit 7
Bit 7
Bit 7
1
0
Reserved
0 : Define Port B as output port
1 : Define Port B as input port
0 : Define Port C as output port
1 : Define Port C as input port
0 : Disable
1 : Enable
0 : UART functions disable. PB4, PB5 as general I/O
1 : UART functions enable. PB4, PB5 as UART Rx, Tx pin
0 : Disable Tx and Rx port inverse output
1 : Enable Tx and Rx port inverse output
INTWK6
IOCB6
Bit 6
Bit 6
Bit 6
Bit 6
1
0
INTWK5
UARTE
IOCB5
Bit 5
Bit 5
Bit 5
Bit 5
1
INTWK4
IOCB4
Bit 4
Bit 4
Bit 4
Bit 4
1
0
UINVEN
INTWK3
IOCB3
IOCC3
Bit 3
Bit 3
Bit 3
Bit 3
8-Bit Microprocessor with OTP ROM
INTWK2
IOCB2
IOCC2
Bit 2
Bit 2
Bit 2
Bit 2
0
INTWK1
IOCC1
IOCB1
Bit 1
Bit 1
Bit 1
Bit 1
0
EM78P510N
INTWK0
IOCC0
IOCB0
Bit 0
Bit 0
Bit 0
Bit 0
0
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