em78p510nso32j/s ELAN Microelectronics Corp, em78p510nso32j/s Datasheet - Page 33

• Manufacturer Part Number: em78p510nso32j/s
• Description: 8-bit Microprocessor With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.1) 01.25.2008
(This specification is subject to change without further notice)
6.2.38 Bank 3 R6 URS (UART Status)
Bit 7 (URRD8): Receiving Data Bit 8
Bit 6 (EVEN): Select Parity Check
Bit 5 (PRE):
Bit 4 (PRERR): Parity Error Flag
Bit 3 (OVERR): Over Running Error Flag
Bit 2 (FMERR): Framing Error Flag
Bit 1 (URBF): UART Read Buffer Full Flag
Bit 0 (RXE):
6.2.39 Bank 3 R7 URRD (UART_RD Data Buffer)
Bits 7~0 (URRD7~URRD0): UART Receive Data Buffer. Read only.
URRD8
URRD7
Bit 7
Bit 7
URRD6
EVEN
Bit 6
Bit 6
Enable Parity Addition
Enable Receiving. It don’t UART transmit interrupt.
0 : Odd parity
1 : Even parity
0 : Disable
1 : Enable
Set to 1 when parity error occurs and cleared to 0 by software.
Set to 1 when overrun error occurs and cleared to 0 by software.
Set to 1 when framing error occurs and cleared to 0 by software.
Set to 1 when one character is received. Reset to 0 automatically
when read from URS register. URBF will be cleared by hardware
when enabling receiving. And URBF bit is read-only. Therefore,
reading the URS register is necessary to avoid overrun error.
0 : Disable
1 : Enable
URRD5
Bit 5
Bit 5
PRE
PRERR
URRD4
Bit 4
Bit 4
OVERR
URRD3
Bit 3
Bit 3
8-Bit Microprocessor with OTP ROM
FMERR
URRD2
Bit 2
Bit 2
URRD1
URBF
Bit 1
Bit 1
EM78P510N
URRD0
Bit 0
Bit 0
RXE
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