em78p510nso32j/s ELAN Microelectronics Corp, em78p510nso32j/s Datasheet
em78p510nso32j/s
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... EM78P510N 8-Bit Microprocessor with OTP ROM Specification ELAN MICROELECTRONICS CORP. Product ERSION January 2008 1.1 ...
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... Trademark Acknowledgments: IBM is a registered trademark and PS trademark of IBM. Windows is a trademark of Microsoft Corporation ELAN and ELAN logo © 2007~2008 by ELAN Microelectronics Corporation Copyright All Rights Reserved Printed in Taiwan The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification ...
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Contents 1 General Description ................................................................................................ 1 2 Features ................................................................................................................... 1 3 Pin Assignment ....................................................................................................... 2 4 Pin Description........................................................................................................ 5 4.1 EM78P510NK32A/SO32 .................................................................................. 5 4.2 EM78P510NQ44/L44........................................................................................ 6 4.3 EM78P510NL48 ............................................................................................... 7 5 Block Diagram ......................................................................................................... 8 6 Function Description .............................................................................................. 9 ...
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Contents 6.2.33 Bank 2 RC SPIS (SPI Status Register) ............................................................ 23 6.2.34 Bank 2 RD SPIC (SPI Control Register) .......................................................... 24 6.2.35 Bank 2 RE SPIR (SPI Read Buffer).................................................................. 25 6.2.36 Bank 2 RF SPIW (SPI Write Buffer) ................................................................. 25 ...
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Power-on Considerations................................................................................ 53 6.7.1 External Power-on Reset Circuit ...................................................................... 53 6.7.2 Residue-Voltage Protection .............................................................................. 54 6.8 Interrupt .......................................................................................................... 55 6.9 LCD Driver...................................................................................................... 56 6.9.1 R5 LCDCR (LCD Control Register) .................................................................. 57 6.9.2 R6 LCDADDR (LCD Address Register) ........................................................... 58 ...
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Contents A Package Type ...................................................................................................... 106 B Package Information ........................................................................................... 107 B.1 EM78P510NK32A ........................................................................................ 107 B.2 EM78P510NSO32 ........................................................................................ 108 B.3 EM78P510NQ44 .......................................................................................... 109 B.4 EM78P510NL44 ........................................................................................... 110 B.5 EM78P510NL48 ............................................................................................111 C Quality Assurance and Reliability .......................................................................112 C.1 Address Trap Detect ...
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... Power saving Sleep mode • Selectable Oscillation mode Package Type: • 32 pin SDIP 400mil : EM78P510NK32AJ/S • 32 pin SOP 450mil : EM78P510NSO32J/S • 44 pin QFP 10×10mm : EM78P510NQ44J/S • 44 pin LQFP 10×10mm : EM78P510NL44J/S • 48 pin LQFP 7×7mm : EM78P510NL48J/S Note: Green product do not contain hazardous substances EM78P510N • ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 3 Pin Assignment PC2/Xin PC3/Xout P81//RESET P84/VREF P90/AD3/PW2 P91/AD2/BUZ P92/AD1 P93/AD0 P94/COM3 P95/COM2 P96/COM1 P97/COM0 2 • VDD 32 1 VSS 31 2 P77/INT3/T1CAP OSCO 3 30 OSCI Test 4 29 P75/INT1/T1OUT/PWM1 5 P74/SEG18/INT0 ...
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P74/SEG18/INT0 P75/INT1/T1OUT/PWM1 P76/INT2/T1CK P77/INT3/T1CAP VDD VSS OSCO OSCI Test PC2/Xin PC3/Xout Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice EM78P510N-44Pin 6 7 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 48 1 P74/SEG18/INT0 2 P75/INT1/T1OUT/PWM1 3 P76/INT2/T1CK 4 P77/INT3/T1CAP 5 VDD 6 VSS 7 OSCO 8 OSCI 9 Test 10 PC2/Xin 11 PC3/Xout 12 P81//RESET 13 4 • ...
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Pin Description 4.1 EM78P510NK32A/SO32 Pin Pin No. P73, 25, P74~P77 28~31 P81, P84 P90~P97 9~16 PA3~PA7 17~21 22~24, PB0~PB2, PB4~PB5 26~27 PC2~PC3 5~6 OSCI OSCO Test Xin Xout /RESET VDD 32 VSS Product Specification (V1.1) 01.25.2008 (This specification is ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 4.2 EM78P510NQ44/L44 Pin Pin No. 1~4, P70~P77 39~42 P81~P87 12~18 P90~P97 19~26 PA0~PA7 27~34 35~38, PB0~PB5 43~44 PC2~PC3 10~11 OSCI OSCO Test Xin 10 Xout 11 /RESET 12 VDD VSS 6 • I/O Type ...
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EM78P510NL48 Pin Pin No. 1~4, P70~P77 39~42 P81~P87 12~18 P90~P97 19~26 PA0~PA7 27~34 35~38, PB0~PB7 43~46 47~48 PC0~PC3 10~11 OSCI OSCO Test Xin 10 Xout 11 /RESET 12 VDD VSS Note: When using common pin I/O and LCD (P70~74, ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 5 Block Diagram P7 ROM P70 P71 P72 P73 P74 Instruction P75 Register P76 P77 P8 Instruction P80 Decoder P81 P82 P83 P84 P85 P86 ALU P87 P9 P90 P91 P92 P93 P94 P95 ...
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Function Description 6.1 Register Configuration 6.1.1 R PAGE Register Configuration Bank 0 Bank 1 R0 (IAR) R1 (TCC) R2 (PC) R3 (SR) R4 (RSR) RBSR LCDCR Reserve LCDAR PORT7 LCDBR PORT8 LCDVCR PORT9 LCDCCR PORTA LCDSCR0 PORTB LCDSCR1 SCCR ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.3 R2 (Program Counter) The structure is depicted in Figure 6-2. Generates 8K × 13 on-chip ROM addresses to the relative programming instruction codes. "JMP" instruction allows the direct loading of the low 10 ...
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R3 (LVD Control, Status) Status Flag, Page Selection Bits Bit 7 LVDEN LVDS1 Bit 7 (LVDEN): Voltage Detect Enable Bit Bits 6~5 (LVDS1~LVDS0): Detect Voltage Select Bits Bit 4 (T): Time-out bit Set the "SLEP" and ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.5 R4 (RAM Select Register) Bit 7 (VDB): Voltage Detector. This is a read only bit. When VDD pin voltage is lower then Vdet (select by LVDS0~LVDS1) this bit will be cleared ...
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Bank 0 R9 (Port 9) Bit 7 R97 Bits 7~0 (R97~R90): Port 9 8-bit I/O Registers. 6.2.10 Bank 0 RA (Port A) Bit 7 RA7 Bits 7~0 (RA7~RA0): Port A 8-bit I/O Registers 6.2.11 Bank 0 RB (Port B) ...
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EM78P510N 8-Bit Microprocessor with OTP ROM CPU Operation Mode 6.2.13 Bank 0 RD TWTCR (TCC and WDT Timer Control Register) Bit 7 WDTE WPSR2 Bit 7 (WDTE): Watchdog Timer Enable. This control bit is used to enable the watchdog Bits ...
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Bits 2~0 (TPSR2~TPSR0): TCC Prescale Bits 6.2.14 Bank 0 RE IMR (Interrupt Mask Register) Bit 7 T1IE LVDIE Bits 7~0 (T1IE~TCIE): Interrupt Enable Bit. Enable interrupt source respectively. External Interrupt INT Pin function Pin INT8 INT9 P83, COM7, AD7 INT8~INT9: ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.16 Bank 1 R5 LCDCR (LCD Control Register) Bit 7 LCDEN LCDTYPE Bit 7 (LCDEN): LCD Enable Select Bit Bit 6 (LCDTYPE): LCD Drive Waveform Type Select Bit Bits 5~4 (BS1~BS0): LCD Bias Select ...
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R6 (LCD Bit 7 Bit 6 Address) (LCD_D7) (LCD_D6) 00H 01H 02H | 14H 15H 16H Common COM7 COM6 6.2.18 Bank 1 R7 LCDBR (LCD Data Buffer) Bit 7 LCD_D 7 LCD_D 6 Bit 7~0 (LCD_D7~LCD_D0): LCD RAM Data Transfer ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bits 2~0 (LCDVC2~LCDVC0): LCD Voltage Control Bits LCDVC2 6.2.20 Bank 1 R9 LCDCCR (LCD Com Control Register 3) Bit 7 COM7 COM6 Bits 7~0 (COM7~COM0): LCD Com 7~0 Control Bits 0 : Disable, functions ...
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Bank 1 RC LCDSCR2 (LCD Segment Control Register 2) Bit 7 - SEG22 Bit 7: Reserved Bits 6~0 (SEG22~SEG16): LCD Segment 22~16 Control Bits 0 : Disable, functions as normal I/O or other functions 1 : Enable, functions as ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.26 Bank 2 R5 T1CR (Timer1 Control Register) Bit 7 TIS1 Bits 7~6 (TIS1~ TIS0): Timer 1 and Timer 2 Interrupt Type Select Bits. These two bits are used when the Timer operates in ...
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Bank 2 R6 TSR (Timer Status Register) Bit 7 T1MOD TRCB Bit 7 (T1MOD): Timer Operation Mode Select Bit By setting T1MOD to “1”, Timer can cascade to one 16-bit Timer. This 16-bit Timer is controlled by Timer 1, ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Mode Selected Timer 1 Capture PWM1 Bit 0 (T1OC): Timer 1 Output Flip-Flop Control Bit 6.2.28 Bank 2 R7 T1PD (Timer1 Period Buffer) Bit 7 PRD1[7] PRD1[6] Bits 7~0 (PRD1 [7]~PRD1 [0]): The content ...
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Bits 4~3 (T2MS1~T2MS0): Timer 2 Operation Mode Selects Bits Bits 2~0 (T2P2~T2P0): Timer 2 Prescale Bits 6.2.31 Bank 2 RA T2PD (Timer 2 Period Buffer) Bit 7 PRD2[7] PRD2[6] Bits 7~0 (PRD2 [7]~PRD2 [0]): The content of this register is ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bits 6~5 (TD1~TD0): SDO Status Output Delay Times Options Reserved Bit 4: Bit 3 (OD3): Open-Drain Control Bit 1 : Open-drain enable for SDO 0 : Open-drain disable for SDO Bit 2 (OD4): Open-Drain ...
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Bit 4 (SSE): Bit 3 (SDOC): SDO Output Status Control Bit Bits 2~0 (SBRS2~SBRS0): SPI Baud Rate Select Bits SBRS2 SBRS1 6.2.35 Bank 2 RE SPIR (SPI Read Buffer) Bit 7 SRB7 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.37 Bank 3 R5 URC (UART Control Register) Bit 7 URTD8 UMODE1 UMODE0 Bit 7 (URTD8): Transmission Data Bit 8 Bits 6~5 (UMODE1~UMODE0): UART Transmission Mode Select Bit Bits 4~2 (BRATE2~BRATE0): Transmit Baud Rate ...
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Bank 3 R6 URS (UART Status) Bit 7 URRD8 EVEN Bit 7 (URRD8): Receiving Data Bit 8 Bit 6 (EVEN): Select Parity Check Bit 5 (PRE): Bit 4 (PRERR): Parity Error Flag Bit 3 (OVERR): Over Running Error Flag ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.40 Bank 3 R8 URTD (UART_TD Data Buffer) Bit 7 URTD 7 URTD 6 Bits 7~0 (URTD7~URTD0): UART Transmit Data Buffer. Write only. 6.2.41 Bank 3 R9 ADCR (A/D Control Register) Bit 7 ADRUN ...
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Bank 3 RA ADICH (A/D Input Control Register) Bit 7 CALI ADREF Bit 7 (CALI): Bit 6 (ADREF): AD Reference Voltage Input Select Bits 5~4: Bits 3~0 (ADE11~ADE8): AD Input Pin Enable Control 6.2.43 Bank 3 RB ADICL (A/D ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bits 6~4 (VOF[2]~VOF[0]): Offset Voltage Bits Bits 3~0 (ADD3~ADD0): AD Low 4-Bit Data Buffer 6.2.46 Bank 3 RE EIESH (External Interrupt Edge Select High Byte Control Register) Bit 7 EIES7 EIES6 Bits 7~0 (EIES7~EIES0): ...
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Bank 4 R5 LEDDCR (LED Drive Control Register) Bit 7 LEDD7 LEDD6 Bits 7~0 (LEDD7~LEDD0): 8-bit LED Drive Control Registers 6.2.49 Bank 4 R6 WBCR (Watch Timer and Buzzer Control Register) Bit 7 WTCS Bit 7 (WTCS): Watch Timer ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.50 Bank 4 R7 PIOCR (Port 7 I/O Control Register) Bit 7 IOC77 IOC76 Bits 7~0 (IOC77~IOC70): Port 7 8-Bit I/O Direction Control Registers 0 : Define Port 7 as output port 1 : ...
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Bank 4 RB PIOCR(Port B I/O Control Register) Bit 7 IOCB7 IOCB6 Bits 7~0 (IOCB7~IOCB0): Port B 8-Bit I/O Direction Control Registers 0 : Define Port B as output port 1 : Define Port B as input port 6.2.55 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.58 Bank 5 R7 P7PHCR (Port 7 Pull High Control Register) Bit 7 PH77 Bits 7~0 (PH77~PH70): Port 7 8-Bit I/O Pull High Control Registers 0 : Pull high disable 1 : Pull high ...
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Bank 5 RB PBPHCR (Port B Pull-high Control Register) Bit 7 PHB7 PHB6 Bits 7~0 (PHB7~PHB0): Port B 8-Bit I/O Pull-high Control Registers 0 : Pull-high disable 1 : Pull-high enable 6.2.63 Bank 5 RC PCPHCR (Port C Pull ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.2.66 Bank 6 R8 P8ODCR (Port 8 Open Drain Control Register) Bit 7 OD87 OD86 Bits 7~1 (OD87~OD80): Port 8 7-bit I/O Open Drain Control Registers 0 : Open drain disable 1 : Open ...
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TCC/WDT Prescaler Registers for the TCC/WDT Circuit R_BANK Address NAME Bank 0 0X0D Bank 0 0x0E Bank 0 0x0F There are two 8-bit counters available as prescales for the TCC and WDT, respectively. The TPSR0~TPSR2 bits of the Bank ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.4 I/O Port Registers for I/O Circuit R_BANK Address Bank 4 0X07~0X0C PIOCR Bank 5 0X07~0X0C PHCR Bank 6 0X07~0X0B ODCR The I/O registers, (Port 7, Port 8, Port 9, Port A, Port B ...
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Figure 6-5 Circuits of I/O Port and I/O Control Register for Ports 7~ 9, and Ports 6.5 Reset and Wake-up A Reset can be caused by: Power-on reset WDT timeout (if enabled) LVR Reset (if enabled) RESET ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Table 2 Summary of the Registers Initialized Values Address Name Reset Type Bit Name Power-on 0x00 R0 (IAR) /RESET and WDT Wake-up from Sleep and Idle mode Bit Name Power-on 0x01 R1 (TCC) /RESET ...
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Address Name Reset Type Bit Name Power-on Bank 0 R9 /RESET and WDT (Port 9) 0x09 Wake-up from Sleep and Idle mode Bit Name Power-on Bank 0 RA /RESET and WDT (Port A) 0x0A Wake-up from Sleep and Idle mode ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Address Name Reset Type Bit Name Power-on Bank 1 R7 /RESET and WDT 0X07 (LCDBR) Wake-up from Sleep and Idle mode Bit Name Power-on Bank 1 R8 /RESET and WDT 0X08 (LCDVCR) Wake-up from ...
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Address Name Reset Type Bit Name Power-on Bank 2 R6 /RESET and WDT (TSR) 0X06 Wake-up from Sleep and Idle mode Bit Name Power-on Bank 2 R7 /RESET and WDT (T1PD) 0X07 Wake-up from Sleep and Idle mode Bit Name ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Address Name Reset Type Bit Name Power-on Bank 2 RF /RESET and WDT (SPIW) 0X0F Wake-up from Sleep and Idle mode Bit Name Power-on Bank3 Bank 3 R5 /RESET and WDT 0x05 (URC) Wake-up ...
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Address Name Reset Type Bit Name Power-on Bank 3 RD /RESET and WDT (ADDL) 0x0D Wake-up from Sleep and Idle mode Bit Name Power-on Bank 3 RE (EIESH) 0x0E /RESET and WDT Wake-up from Sleep and Idle mode Bit Name ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Address Name Reset Type Bit Name Power-on Bank 4 RB /RESET and WDT (IOCB) 0x0B Wake-up from Sleep and Idle mode Bit Name Power-on Bank 4 RC /RESET and WDT (IOCC) 0x0C Wake-up from ...
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Address Name Reset Type Bit Name Power-on Bank 5 RC /RESET and WDT 0x0C (PCPHCR) Wake-up from Sleep and Idle mode Bit Name Bank6 Power-on Bank 6 R7 /RESET and WDT 0x07 (P7ODCR) Wake-up from Sleep and Idle mode Bit ...
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EM78P510N 8-Bit Microprocessor with OTP ROM The controller can be awakened from sleep mode and idle mode. The wake-up signals list as following. Wake-up Signal TCC time out INT pin Timer 1 Timer 2 UART SPI LVD A/D Watch Timer ...
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Oscillator 6.6.1 Oscillator Modes The EM78P510N can be operated in the three different oscillator modes for the main oscillator (R-OSCI, OSCO), namely, RC oscillator with external resistor and Internal capacitor mode (IC), crystal oscillator mode, and PLL operation mode. ...
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EM78P510N 8-Bit Microprocessor with OTP ROM In most applications, pin R-OSCI and pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Figure 6-7 depicts such circuitry. Table 5 provides the recommended values of C1 and ...
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Figure 6-9 Circuit for Crystal/Resonator-Parallel Mode 6.6.3 RC Oscillator Mode with Internal Capacitor If both precision and cost are taken into consideration, the EM78P510N also offers a special oscillation mode, which has a built-in internal capacitor and an external resistor ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Table 6 R Oscillator Frequencies Pin R-OSCI Xin 1 : Measured based on DIP packages. Note The values are for design reference only. 6.6.4 Phase Lock Loop (PLL Mode) When operating in ...
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Power-on Considerations Any microcontroller is not warranted to start operating properly before the power supply stabilizes in steady state. The EM78P510N has a built-in Power-on Reset (POR) with detection level range of 1.9V to 2.1V. The circuitry eliminates the ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.7.2 Residue-Voltage Protection When battery is replaced, device power (VDD) is taken off but residue-voltage remains. The residue-voltage may trips below Vdd minimum, but not to zero. This condition may cause a poor power-on ...
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Interrupt Registers for Interrupt R_BANK Address Name Bank 0 0x0E Bank 0 0x0F Bank 1 0X0E Bank 1 0X0F Bank 2 0X09 The EM78P510N has ten interrupt sources as listed below: TCC overflow interrupt External interrupt pin Watch timer ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Interrupt sources ENI/DISI Table 7 Interrupt Vector Interrupt Vector 0003H 0006H 0009H 000CH 000FH 0012H 0015H 0018H 001BH 6.9 LCD Driver Registers for LCD Driver Circuit R_BANK Address Name Bank 1 0X05 LCDCR Bank ...
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The EM78P510N can drive LCD segments and 8 commons that can drive 8×23 dots totally. LCD block is made up of LCD driver, display RAM, segment output pins, common output pins and LCD operating power supply pins. ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bits 1~0 (LCDF1~LCDF0): LCD Frame Frequency Control Bits LCDF1 LCDF0 6.9.2 R6 LCDADDR (LCD Address Register) Bit 7 0 Bits 7~5: Reserved Bits 4~0 (LCD_A4~LCD_A0): LCD ...
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R7 LCDBR (LCD Data Buffer) Bit 7 LCD_D 7 LCD_D 6 Bits 7~0 (LCD_D7~LCD_D0): LCD RAM Data Transfer Register When the value of the display segment is “1”, the LCD display is turned on; when the * bit value ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bit 2~0 (LCDVC2~LCDVC0): LCD Voltage Control Bits LCDVC2 LCD Clock Frame COM SEG COM-SEG 60 • LCDVC1 LCDVC0 ...
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COM 0 COM 1 COM 2 SEG N SEG N - COM0 ON SEG N - COM1 OFF COM 0 COM 1 COM 2 SEG N SEG N - COM0 ON SEG N - COM1 OFF Product Specification (V1.1) 01.25.2008 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM COM 0 COM 1 COM 2 SEG N SEG N - COM0 ON SEG N - COM1 OFF COM 0 COM 1 COM COM0 ON SE ...
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COM 0 COM 1 COM 2 SEG N SEG N - COM0 ON SEG N - COM1 OFF COM 0 COM 1 COM 2 SEG N SEG N - COM0 ON SEG N - COM1 OFF Product Specification (V1.1) 01.25.2008 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM COM 0 COM 1 COM 2 SEGN SEGN-COM0 SEGN-COM1 64 • Select Frame 1/4 Bias 1/3 Duty Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) VDD VLCD1 VLCD2 VLCD3 ...
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COM 0 COM 1 COM 2 SEGN SEGN-COM0 SEGN-COM1 Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) 8-Bit Microprocessor with OTP ROM Select Frame 1/4 Bias 1/4 Duty EM78P510N VDD VLCD1 VLCD2 VLCD3 VLCD VDD ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Frame COM 0 COM 1 COM 2 SEGN SEGN-COM0 SEGN-COM1 66 • Select 1/4 Bias 1/8 Duty Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) VDD VLCD1 VLCD2 VLCD3 ...
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A/D Converter Registers for AD Converter Circuit R_BANK Address NAME Bank 3 0X09 Bank 3 0x0A Bank 3 0X0B Bank 3 0X0C Bank 3 0X0D Bank 0 0x0F Bank 0 0x0E Bank 0 0x0F This is a 12-bit successive ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.10.1 ADC Data Register When the A/D conversion is completed, the result is loaded to the ADDH (8-bit) and ADDL (4-bit). The START/END bit is cleared, and the ADIF is set. 6.10.2 A/D Sampling ...
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UART (Universal Asynchronous Receiver/Transmitter) Registers for UART Circuit R_BANK Address NAME Bit 7 Bank 3 0X05 Bank 3 0X06 Bank 3 0X07 Bank 3 0X08 Bank 5 0x06 Bank 0 0x0E Bank 0 0x0F In Universal Asynchronous Receiver Transmitter ...
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EM78P510N 8-Bit Microprocessor with OTP ROM The figure below shows the general format of one character sent or received. The communication channel is normally held in the marked state (high). Character transmission or reception starts with a transition to the ...
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Transmitting In transmitting serial data, the UART operates as follows: 1. Set the TXE bit of the URC register to enable the UART transmission function. 2. Write data into the URTD register and the UTBE bit of the URC ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.11.4 Baud Rate Generator The baud rate generator is comprised of a circuit that generates a clock pulse to determine the transfer speed for transmission/reception in the UART. The BRATE2~BRATE0 bits of the URC ...
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UART Receive operation (8 bits data with parity and stop bit): START bit RXD pin Synchronization Sample Timing URBF URTIF PRERR OVERR FMERR 6.12 SPI (Serial Peripheral Interface) 6.12.1 Overview & Features Overview: Figures 6-20 and 6-21 shows how ...
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EM78P510N 8-Bit Microprocessor with OTP ROM SPIW Reg SPIW Reg SPIR Reg SPIR Reg SPIR Reg SPIR Reg SPIS Reg SPIS Reg SPIS Reg SPIS Reg Master Device Master Device Figure 6-21 SPI Configuration of Single-Master and Multi-Slave 74 • ...
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SPI Function Description RBF Set to 1 Buffer Full Detector PA4/SEG4/SI PA5/SEG5/SO PA7/SEG7//SS Fosc Figure 6-23 The Function Block Diagram of SPI Transmission Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) Read SPIIF SSE ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Below are the functions of each block and explanations on how to carry out the SPI communication with the signals depicted in Figure 6-22 and Figure 6-23. PA4/SEG4/SI: Serial Data In PA5/SEG5/SO: Serial Data ...
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Program the same clock rate and clock edge to latch on both the master and slave devices. The byte received will update the transmitted byte. The RBF (located in Register 0x0C) will be set as the SPI operation is completed. ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Note: 1. The Priority of PA4/SEG4/SI Pin High SI 2. The Priority of PA5/SEG5/SO Pin High SO 3. The Priority of PA6/SEG6/SCK Pin PA6/SEG6/SCK Pin Priority High SCK 4. The Priority of PA7/SEG7//SS PIN ...
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Bit 7 (CES): Clock Edge Select Bit Bit 6 (SPIE): SPI Enable Bit Bit 5 (SRO): SPI Read Overflow Bit Bit 4 (SSE): SPI Shift Enable Bit Bit 3 (SDOC): SDO Output Status Control Bit Bits 2~0 (SBRS2~SBRS0): SPI Baud ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bit 4 (SPIIE): Interrupt Enable Bit Related Status/Data Registers of the SPI Mode Address Name 0X0C SPIS 0x0E SPIR 0x0F SPIW SPIS: Bit 7 (DORD): Data Shift Control Bit Bits 6~5 (TD1~TD0): SDO Status ...
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SPI Mode Timing The SCK edge is selected by programming bit CES. The waveform shown in Figure6-24 is applicable regardless of whether the EM78P510N is in master or slave mode with /SS disabled. However, the waveform in Figure6-25 can ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.13 Timer/Counter 1 Registers for Timer/Counter 1 Circuit R_BANK Address Name Bank 2 0X05 Bank 2 0X06 Bank 2 0X07 Bank 2 0X08 Bank 0 0x0E Bank 0 0x0F 82 • Bit 7 Bit ...
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Timer Mode In Timer mode, counting down is performed using the internal clock. The down-counter value auto reloads from T1PD. When the contents of the down-counter underflow, an interrupt is generated and the counter is cleared. Counting down resumes ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.13.4 PWM Mode In Pulse Width Modulation (PWM) Output mode, counting down is performed using the internal clock with prescale or external clock trough T1CLK Pin or Sub Frequency with prescale. The Duty of ...
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Timer 2 Registers for Timer 2 Circuit R_BANK Address NAME Bank 2 0X06 Bank 2 0X09 Bank 2 0X0A Bank 2 0X0B Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) 8-Bit Microprocessor with OTP ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 6.14.1 Timer Mode In Timer mode, counting down is performed using the internal clock with prescaler. When the counter value from T2PD underflows, interrupt is then generated and the counter is cleared. Counting down ...
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Code Options The EM78P510N has one Code Option word that is not part of the normal program memory. The option bits cannot be accessed during normal program execution. Code Option Register and Customer ID Register arrangement distribution: Word 0 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Bit 3 (HLP): Power Consumption Selection Bit 0 : Low power consumption, apply to working frequency at 4MHz or below 4MHz High power consumption, apply to working frequency above 4MHz. Bits 2~0 ...
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Instruction Set Each instruction in the Instruction Set is a 13-bit word divided into an OP code and one or more operand. Normally, all instructions are executed within one single instruction cycle (one instruction consists of 2 oscillator periods), ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Binary Instruction 0 0001 00rr rrrr 0 0001 01rr rrrr 0 0001 10rr rrrr 0 0001 11rr rrrr 0 0010 00rr rrrr 0 0010 01rr rrrr 0 0010 10rr rrrr 0 0010 11rr rrrr ...
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Binary Instruction 0 0111 11rr rrrr 0 100b bbrr rrrr 0 101b bbrr rrrr 0 110b bbrr rrrr 0 111b bbrr rrrr 1 00kk kkkk kkkk 1110 1010 kkkk k kkkk kkkk kkkk 1 01kk kkkk kkkk 1110 1011 kkkk ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 7 Absolute Maximum Ratings Items Supply voltage Input voltage Output voltage Operation temperature Storage temperature Power dissipation Operating Frequency (2clk Electrical Characteristics 8.1 DC Electrical Characteristics Ta= 25°C, VDD= 5.0V±5%, VSS= 0V ...
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Symbol Parameter IPH1 Pull-high current Stop mode ISB1 Power down current Stop mode ISB2 Power down current ICC1 Idle mode current ICC2 Idle mode current ICC3 Idle mode current ICC4 Green mode current ICC5 Normal mode ICC6 Normal mode LCD ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 8.2 A/D Converter Characteristic VDD=2.5V to 5.5V, Vss=0V, Ta=- ° C Symbol Parameter VREF Analog reference voltage VREF – VSS ≥ 2.5V VSS VAI Analog input voltage Ivdd IAI1 Analog supply current ...
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Phase Lock Loop Characteristic 8.3.1 PLL DC Electrical Characteristic Symbol VD Digital Supply Voltage 8.3.2 AC Electrical Characteristic Parameter Input Clock Output Clock Current Consumption Lock Up Time Frequency Accuracy Note: 1. These parameters are hypothetical (not tested) and ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 5 Vih max (-40°C to 85°C) 4.5 Vih typ 25°C 4 Vih min (-40°C to 85°C) 3.5 3 2.5 2 1 2.5 0.00 -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 ...
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Figure 8-6 WDT Time out Period vs. VDD, perscaler ...
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EM78P510N 8-Bit Microprocessor with OTP ROM 2.5 2.0 1.5 1.0 0.5 0.0 2.1 2.5 35.0 34.5 34.0 33.5 33.0 32.5 2.1 2.5 ERC OSC Frequency vs Temp.(Cext=100pF, Rext=5.1K) 1.015 1.010 1.005 1.000 0.995 0.990 0.985 0.980 -40 -30 -20 98 ...
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There are two conditions with the Standby Current ISB1 and ISB2. These conditions are as follows: ISB1: WDT disable (Sleep mode) ISB2: WDT enable (Sleep mode) Typical ISB1 and ISB2 VS. ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Maximum ISB1 and ISB2 VS. Temperature(VDD=3V -40 -20 Figure 8-12 Maximum Standby Current (VDD=3V) vs. Temperature Typical ISB1 and ISB2 VS. Temperature(VDD=5V -40 -20 ...
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Maximum ISB1 and ISB2 VS. Temperature(VDD=5V -40 -20 Figure 8-14 Maximum Standby Current (VDD=5V) vs. Temperature Four conditions exist with the Operating Current ICC1 to ICC6. These conditions are as follows: ICC1: Fosc=32.768kHz, 2 clocks, ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Maximum ICC1 and ICC2 VS. Temperature(VDD=3V -40 -20 Figure 8-16 Maximum operating current (VDD=3V) vs. Temperature Typical ICC1 and ICC2 VS. Temperature(VDD=5V -40 ...
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Figure 8-19 Typical operating current vs. Temperature Maximum ICC4 vs. Temperature -40 -20 Figure 8-20 Maximum operating current vs. Temperature -40 -20 Figure 8-21 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM Maximum ICC5 vs. Temperature -40 -20 Figure 8-22 Maximum Operating Current vs. Temperature 9 AC Electrical Characteristics (Ta=- 40 ° ° C, VDD=5V±5%, GND=0V) Symbol Parameter Dclk ...
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Timing Diagrams AC Test Input/Output Waveform VDD-0.5 VSS+0.5 AC Testing : Input is driven at VDD-0.5V for logic "1",and VSS+0.5V for logic "0".Timing measurements are made at 0.75VDD for logic "1",and 0.25VDD for logic "0". RESET Timing (CLK="0") CLK ...
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... EM78P510N 8-Bit Microprocessor with OTP ROM A Package Type OTP MCU EM78P510NK32AJ/S EM78P510NSO32J/S EM78P510NQ44J/S EM78P510NL44J/S EM78P510NL48J/S J/S: Green product is not contain hazardous substances The third edition of Sony SS-00259 standard. Pb content should be less the 100ppm Pb content to fit in with Sony spec. Part no. Electroplate type Ingredient (%) Melting point(° ...
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B Package Information B.1 EM78P510NK32A Figure B-1 EM78P510N 32-pin SDIP Package Type Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) EM78P510N 8-Bit Microprocessor with OTP ROM • 107 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM B.2 EM78P510NSO32 Figure B-2 EM78P510N 32-pin SOP Package Type 108 • Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) ...
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B.3 EM78P510NQ44 Figure B-3 EM78P510N 44-pin QFP Package Type Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) EM78P510N 8-Bit Microprocessor with OTP ROM • 109 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM B.4 EM78P510NL44 Figure B-4 EM78P510N 44-pin LQFP Package Type 110 • Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) ...
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B.5 EM78P510NL48 Figure B-5 EM78P510N 48-pin LQFP Package Type Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) EM78P510N 8-Bit Microprocessor with OTP ROM • 111 ...
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EM78P510N 8-Bit Microprocessor with OTP ROM C Quality Assurance and Reliability Test Category Solder temperature=245±5°C, for 5 seconds up to the Solderability stopper using a rosin-type flux Step 1: TCT, 65°C (15mins)~150°C (15mins), 10 cycles Step 2: Bake at 125°C, ...
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D EM78P510N Program Pin List DWTR is used to program the EM78P510N IC’s. The connector of DWTR is selected by CON3 (EM78P447). The software is selected by EM78P510N. Program Pin Name Pin #31 Pin #30 Pin #28 Pin #8 Pin ...
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EM78P510N 8-Bit Microprocessor with OTP ROM E.2 Mode2 Main oscillator: PLL mode, Sub oscillator: Crystal mode JP4 E.3 Mode3 Main oscillator: ERIC mode, Sub oscillator: Crystal mode JP4 E.4 Mode4 Main oscillator: Crystal mode, Sub oscillator: ERIC mode JP4 114 ...
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E.5 Mode5 Main oscillator: PLL mode, Sub oscillator: RC mode GND JP4 GND E.6 Mode6 Main oscillator: RC mode, Sub oscillator: RC mode GND JP4 GND E.7 Mode7 Main oscillator: Crystal mode, Sub oscillator: None GND JP4 GND Product Specification ...
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EM78P510N 8-Bit Microprocessor with OTP ROM F ICE 510 Output Pin Assignment (JP 3) 116 • Product Specification (V1.1) 01.25.2008 (This specification is subject to change without further notice) ...