em78p510nso32j/s ELAN Microelectronics Corp, em78p510nso32j/s Datasheet - Page 15

• Manufacturer Part Number: em78p510nso32j/s
• Description: 8-bit Microprocessor With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

6
Product Specification (V1.1) 01.25.2008
(This specification is subject to change without further notice)
Function Description
R1 (TCC)
R4 (RSR)
R0 (IAR)
R2 (PC)
R3 (SR)
Reserve
TWTCR
PORTA
PORTB
RBSR
PORT7
PORT8
PORT9
Bank 0
SCCR
R20
R1F
R3F
ISR
R10
IMR
‧
‧
‧
‧
‧
6.1 Register Configuration
6.1.1 R PAGE Register Configuration
6.2 Register Operations
6.2.1 R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as an indirect addressing pointer.
Any instruction using R0 as register actually accesses data pointed by the RAM Select
Register (R4).
6.2.2 R1 (TCC)
Incremented by the main oscillator clock (Fm) or sub oscillator clock (Fs) (controlled by
TWTCR register). Written and read by the program as any other register.
LCDSCR0
LCDSCR1
LCDSCR2
LCDCCR
General Purpose RAM
Reserve
LCDVCR
Bank 1
LCDCR
LCDAR
LCDBR
EIMR
Bank 1
EISR
‧
‧
‧
‧
.
Figure 6-1 Data Memory Configuration
.
. .
T2PD
T1PD
Bank 2
T1CR
SPIS
SPIC
T1TD
T2TD
T2CR
SPIR
SPIW
TSR
‧
‧
‧
‧
.
.
Bank 7
EIESH
EIESL
ADICH
Bank 3
ADICL
ADDL
ADDH
URRD
URTD
ADCR
URC
URS
R20
R3F
‧
‧
‧
8-Bit Microprocessor with OTP ROM
LEDDCR
Reserve
Reserve
WBCR
Bank 4
WKCR
IOCA
IOCB
IOCC
IOC7
IOC8
IOC9
PAPHCR
PBPHCR
PCPHCR
P7PHCR
P8PHCR
P9PHCR
URC2
Reserve
Reserve
Reserve
Reserve
Bank 5
EM78P510N
PAODCR
PBODCR
P8ODCR
P7ODCR
P9ODCR
LVRCR
Reserve
Reserve
Reserve
Reserve
PORTC
Bank 6
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