ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 68

• Manufacturer Part Number: ort8850
• Description: Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
• Manufacturer: Lattice Semiconductor Corp.

Table 19. Memory Map Descriptions (Continued)
Lattice Semiconductor
* For Channels AA, AB, AC, AD, BA, BB, BC, BD respectively
Note: Registers at addresses ≥ 300E3 must remain at their default (reset) settings and must not be changed by the user.
Absolute
Address
30037*
300DF
300AF
300C7
300E0
300E1
300E2
3004F
30067
3007F
30097
(0x)
[6-7]
[3:4]
[0:7]
[0:7]
Bit
[0]
[1]
[2]
[5]
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
-
-
-
alignment control
Enable work/pro-
mover and align-
RX path SONET
Bypass pointer
Bypass pointer
tect channels
Multichannel
CDR control
CDR control
CDR control
CDR control
CDR control
ment FIFO
Quad Rate
Reserved
Not Used
Not Used
Not Used
Half Rate
register
register
register
register
register
framer
mover
Name
Reset
Value
(0x)
00
0
0
0
0
0
0
0
0
0
0
0
0
0
68
0 = use pointer mover
1 = Bypass pointer mover.
0 = uses alignment FIFO and pointer mover
1 = Bypass alignment FIFO and pointer mover.
Bit to control the LVDS receivers to CDR.
0 = Use LVDS receivers from HSI work channels.
1 = Use LVDS receivers from HSI protect channels.
00 = No alignment.
10 = Align with twin (i.e., STM B stream A).
01 = Align with all 4 (i.e., STM A all streams).
11 = Align with all 8 (i.e., STM A and B all streams).
0 = Enable framer.
1 = Disable SONET framing data is passed through
Reserved, must be set to 0.
Always set to zero
When set to 1, controls bypass of 16 PLL generated
phases with 16 low-speed phases.
Enables CDR loopback.
0 = No loopback.
1 = Loopback TX to RX.
Enables bypassing of the internal 622 MHz clock with
TSTCLK. Must be used for simulation
0 = Use PLL.
1 = Bypass PLL (uses TSTCLK as reference clock).
Enables CDR test mode. Initiates CDR’s built-in self-test:
0 = Regular mode.
1 = Test mode.
Per Channel select for half rate mode can only be used in
pure bypass mode. Bit 7 is for channel BD, bit 6 is for BC
etc.
0 = full rate
1 = half rate
Per Channel select for quad rate mode can only be used in
pure bypass mode. Bit 7 is for channel BD, bit 6 is for BC
etc.
0 = full rate
1 = quad rate
ORCA ORT8850 Data Sheet
Description