r8a66597 Renesas Electronics Corporation., r8a66597 Datasheet - Page 104

• Manufacturer Part Number: r8a66597
• Description: Assp Usb2.0 2 Port Host/1 Port Peripheral Controller
• Manufacturer: Renesas Electronics Corporation.

R8A66597FP/DFP/BG
2.18 Transaction counter
Remarks
* Not modify each bit of the register except when "CSSTS=0" and "PID=NAK". To modify each bit after modifying the PID bit of
the pipe from "BUF" to "NAK", check that "CSSTS=0" and "PBUSY=0", and then modify it. However, when the controller
modifies PID bit to "NAK", it is not necessary to check the PBUSY bit.
2.18.1 Transaction counter enabled bit (TRENB)
2.18.2 Transaction counter clear bit (TRCLR)
R e v 1 . 0 1
15-10 Unassigned. Fix to "0".
7-0 Unassigned. Fix to "0"."
Bit
9
8
♦ Pipe1 Transaction counter enabled register [PIPE1TRE]
♦ Pipe2 Transaction counter enabled register [PIPE2TRE]
♦ Pipe3 Transaction counter enabled register [PIPE3TRE]
♦ Pipe4 Transaction counter enabled register [PIPE4TRE]
♦ Pipe5 Transaction counter enabled register [PIPE5TRE]
15
?
?
TRENB
Transaction counter enabled
TRCLR
Transaction counter clear
For the reception pipe, after the total number of packets is written to the TRNCNT bit using the software, the controller
executes the following control on receiving the same number of packets as the setup value of the TRNCNT bit:
(1) When the continuous transmission/reception mode is used (write "CNTMD=1"), toggles on CPU side even if the
FIFO buffer is not full when reception is completed.
(2) If writing "SHTNAK=1", modifies the pipe PID bit to "NAK".
(3) If writing "DENDE=1" and "PKTMD=0", asserts the DEND signal while reading the last data.
(4) If writing "BFRE=1", asserts the BRDY interrupt.
Regarding the transmission pipe, write "0" to this bit. When the transaction count function is not used, write "0" to this
bit. When the transaction count function is used, set the TRNCNT bit before writing "1" to this bit. Also write "1" to this
bit before receiving the initial packet that is the transaction target.
If the software writes "1" to this bit, the controller clears the current count value of the transaction counter
corresponding to the pipe and sets "0" in this bit.
O c t 1 7 , 2 0 0 8
14
?
?
Name
13
?
?
12
?
?
p a g e 1 0 4 o f 1 8 3
11
?
?
Specifies whether the transaction counter is
invalid/valid.
0: Transaction counter function invalid
1: Transaction counter function valid
Transaction counter can be cleared to "0" by writing "1"
0: Invalid
1: Count counter clear
to this bit.
10
?
?
TRENB TRCLR
9
0
-
8
0
-
Function
7
?
?
6
?
?
5
?
?
4
?
?
R(0)/W(1)
Software Hardware Remarks
R/W
3
?
?
2
?
?
<Address: 9CH>
<Address: A0H>
<Address: 90H>
<Address: 94H>
<Address: 98H>
R
R
1
?
?
0
?
?