am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 57

• Manufacturer Part Number: am45dl3208g
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram
• Manufacturer: Advanced Micro Devices

Pseudo SRAM AC CHARACTERISTICS
Power Up Time
When powering up the SRAM, maintain V
Read Cycle
Notes:
1. CE1#s = OE# = V
2. Do not access device with cycle timing shorter than t
March 12, 2004
Parameter
t
t
Symbol
t
CO1
HZ1
LZ1
t
t
t
t
t
t
t
t
t
OHZ
OLZ
BHZ
BLZ
OH
RC
AA
OE
BA
, t
, t
, t
CO2
LZ2
HZ2
Address
Data Out
Description
Read Cycle Time
Address Access Time
Chip Enable to Output
Output Enable Access Time
LB#s, UB#s to Access Time
Chip Enable (CE1#s Low and CE2s High) to Low-Z
Output
UB#, LB# Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
UB#s, LB#s Disable to High-Z Output
Output Disable to High-Z Output
Output Data Hold from Address Change
IL
, CE2s = WE# = V
Figure 29. Pseudo SRAM Read Cycle—Address Controlled
Previous Data Valid
IH
, UB#s and/or LB#s = V
CC
P R E L I M I N A R Y
s for 100 µs minimum with CE#1s at V
t
OH
RC
Am45DL3208G
for continuous periods < 10 µs.
t
AA
IL
t
RC
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Data Valid
IH
70
70
70
70
35
70
.
Speed
10
10
25
25
25
10
5
85
85
85
85
40
85
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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