am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 10

• Manufacturer Part Number: am45dl3208g
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram
• Manufacturer: Advanced Micro Devices

PIN DESCRIPTION
A18–A0
A20–A19, A-1 = 3 Address Inputs (Flash)
SA
DQ15–DQ0
CE#f
CE#1s
CE2s
OE#
WE#
RY/BY#
UB#s
LB#s
CIOf
CIOs
RESET#
WP#/ACC
V
V
V
NC
8
CC
CC
SS
f
s
= 19 Address Inputs (Common)
= Lowest Order Address Pin (PSRAM)
= Chip Enable (Flash)
= Write Enable (Common)
= Ready/Busy Output
= Lower Byte Control (PSRAM)
= Hardware Reset Pin, Active Low
= Hardware Write Protect/
= 16 Data Inputs/Outputs (Common)
= Chip Enable 1 (PSRAM)
= Chip Enable 2 (PSRAM)
= Output Enable (Common)
= Upper Byte Control (PSRAM)
= I/O Configuration (Flash)
= I/O Configuration (PSRAM)
= Flash 3.0 volt-only single power sup-
= PSRAM Power Supply
= Device Ground (Common)
= Pin Not Connected Internally
Byte mode
CIOf = V
CIOf = V
CIOs = V
CIOs = V
Acceleration Pin (Flash)
ply (see Product Selector Guide for
speed options and voltage supply
tolerances)
IH
IL
IH
IL
= Byte mode (x8)
= Word mode (x16),
= Byte mode (x8)
= Word mode (x16),
P R E L I M I N A R Y
Am45DL3208G
LOGIC SYMBOL
19
A20–A19, A-1
SA
CE#f
CE1#s
CE2s
OE#
WE#
WP#/ACC
RESET#
UB#s
LB#s
CIOf
CIOs
A18–A0
DQ15–DQ0
RY/BY#
16 or 8
March 12, 2004