am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 29

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am45dl3208g

Manufacturer Part Number
am45dl3208g
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Advanced Micro Devices
Datasheet
FLASH COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device op-
erations. Tables
command sequences. Writing incorrect address and
data values or writing them in the improper sequence
may place the device in an unknown state. A reset
command is then required to return the device to read-
ing array data.
All addresses are latched on the falling edge of WE#
or CE#f, whichever happens later. All data is latched
on the rising edge of WE# or CE#f, whichever hap-
pens first. Refer to the AC Characteristics section for
timing diagrams.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. Each bank is ready to read array data
after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command,
the corresponding bank enters the erase-sus-
pend-read mode, after which the system can read
data from any non-erase-suspended sector within the
same bank. The system can read array data using the
standard read timing, except that if it reads at an ad-
dress within erase-suspended sectors, the device out-
puts status data. After completing a programming
operation in the Erase Suspend mode, the system
may once again read array data with the same excep-
tion. See the Erase Suspend/Erase Resume Com-
mands section for more information.
The system must issue the reset command to return a
bank to the read (or erase-suspend-read) mode if DQ5
goes high during an active program or erase opera-
tion, or if the bank is in the autoselect mode. See the
next section, Reset Command, for more information.
See also Requirements for Reading Array Data in the
section for more information. The Read-Only Opera-
tions table provides the read parameters, and
15
Reset Command
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the bank to which the sys-
tem was writing to the read mode. Once erasure be-
gins, however, the device ignores reset commands
until the operation is complete.
March 12, 2004
shows the timing diagram.
15
and
16
define the valid register
P R E L I M I N A R Y
Figure
Am45DL3208G
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to the read mode. If the
program command sequence is written to a bank that
is in the Erase Suspend mode, writing the reset
comm an d re tu r ns tha t ba nk to t he e rase -sus-
pend-read mode. Once programming begins, however,
the device ignores reset commands until the operation
is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must be written to return to the read mode. If a bank
entered the autoselect mode while in the Erase Sus-
pend mode, writing the reset command returns that
bank to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to the
read mode (or erase-suspend-read mode if that bank
was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
The autoselect command sequence may be written to
an address within a bank that is either in the read or
erase-suspend-read mode. The autoselect command
may not be written while the device is actively pro-
gramming or erasing in the other bank.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the au-
toselect command. The bank then enters the autose-
lect mode. The system may read any number of
autoselect codes without reinitiating the command se-
quence.
Tables
ments. To determine sector protection information, the
system must write to the appropriate bank address
(BA) and sector address (SADD). Tables
the address range and bank number associated with
each sector.
The system must write the reset command to return to
the read mode (or erase-suspend-read mode if the
bank was previously in Erase Suspend).
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence
The SecSi Sector region provides a secured data area
containing a random, sixteen-byte electronic serial
number (ESN). The system can access the SecSi
15
and
16
show the address and data require-
5
and
7
show
27

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