s71ws256jc0 Meet Spansion Inc., s71ws256jc0 Datasheet - Page 140

• Manufacturer Part Number: s71ws256jc0
• Description: Stacked Multi-chip Product Mcp 128/64 Megabit 8m/4m X 16-bit Cmos 1.8 Volt-only, Simultaneous Read/write, Burst Mode Flash Memory With Cellularram
• Manufacturer: Meet Spansion Inc.

Notes:
1. For RCR[6:5] = 00b (default), refer to
2. In order to achieve low standby current, all inputs must be driven to either V
3. Values of TCR for 85 are 100% tested. Values of TCR for 15 and 45 are sampled only.
Note: Typical ISB currents for each PAR setting with the appropriate TCR selected, or temperature sensor enabled.
March 9, 2005 CellRam_03_A0
Full Array
1/2 Array
1/4 Array
1/8 Array
0 Array
to 500ms after power-up, or after changes to the PAR array partition.
70
60
50
40
30
20
10
Deep Power-down
0
-30
Description
-20
Table 31.2 Maximum Standby Currents for Applying PAR and TCR Settings
PAR
-10
0
A d v a n c e
10
V
Table 31.3 Deep Power-Down Specifications
Figure 31.1 Typical Refresh Current vs. Temperature (I
IN
= V
Temperature (°C)
Figure 31.1
20
CC
Conditions
Q or 0V; +25°C
+15°C (RCR[6:5] = 10b)
30
I n f o r m a t i o n
CellularRAM Type 2
for typical values.
40
70
65
60
57
50
50
60
+45°C (RCR[6:5] = 01b)
70
Symbol
CCQ
I
ZZ
TCR
or V
80
80
75
70
55
85
SS
. ISB might be slightly higher for up
90
Typ
10
TCR
+85°C (RCR[6:5] = 11b)
PAR = Full Array
PAR = 1/2 of Array
PAR = 1/4 of Array
PAR = 1/8 of Array
PAR = None of Array
)
120
115
110
105
70
Units
µA
139