m28333-3x Mindspeed Technologies, m28333-3x Datasheet - Page 22

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m28333-3x

Manufacturer Part Number
m28333-3x
Description
Single/dual/triple E3/ds3/sts-1 Line Interface Unit
Manufacturer
Mindspeed Technologies
Datasheet
1.0 Pin Description
1.1 Pin Assignments
Table 1-1. M2833i-3x Pin Definitions (8 of 9)
1-12
M28331-3x M28332-3x M28333-3x
9, 20, 29,
100
73
58
99
97
96
10, 19
Pin #
95
30
81
44
99
97
96
95
73
30
81
58
44
99
97
96
Signal Name
Mindspeed Technologies
REFCLK1
REFCLK2
REFCLK3
REFCLK
RBIAS
Reset
GPD
VSS
PD1
PD2
PD3
PD
Miscellaneous
Ground
Power down for
Ch1
Power down for
Ch2
Power down for
Ch3
Reference clock
for Ch1
Reference clock
for Ch2
Reference clock
for Ch3
Bias resistor
Reset
Global Power
down
Description
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
I/O/P
O
P
I
I
I
I
I
I
I
I
M28331/M28332/M28333 (–3x)
Connect to ground.
Power down transceiver channel
0 = Power down channel (off)
1 = Channel active (on)
Note: A special power-down mode exists
when all three PDBs are set low. This
special mode shuts off the entire chip
(including biasing).
Reference clock from off-chip.
This clock should be set to one of the
following with all rates =
tolerance:
The clock rate should correspond to the
mode of operation that has been chosen for
the channel. See
Reset, about the valid clock available during
power-up.
A 12.1 k ± 1% resistor tied from this pin
to ground provides the current reference to
the entire chip.
Asynchronous reset (reset entire device).
Power down (Static Idd testing).
0 = Power down disable
1 = Power down active
E3 rate (34.368 MHz)
DS3 rate (44.736 MHz)
STS-1 rate (51.84 MHz)
(2)
Section
Notes
28333-DSH-003-A
±
2.5.2, Power-On
20 ppm

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