m28333-3x Mindspeed Technologies, m28333-3x Datasheet

no-image

m28333-3x

Manufacturer Part Number
m28333-3x
Description
Single/dual/triple E3/ds3/sts-1 Line Interface Unit
Manufacturer
Mindspeed Technologies
Datasheet
Single/Dual/Triple E3/DS3/STS-1
Line Interface Unit
Data Sheet
M28331/M28332/M28333 (–3x)
28333-DSH-003-A
March 2003

Related parts for m28333-3x

m28333-3x Summary of contents

Page 1

... Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Data Sheet M28331/M28332/M28333 (–3x) 28333-DSH-003-A March 2003 ...

Page 2

... Mindspeed Technologies™, a Conexant business All Rights Reserved. Information in this document is provided in connection with Mindspeed Technologies (“Mindspeed”) products. These materials are provided by Mindspeed as a service to its customers and may be used for informational purposes only. Mindspeed assumes no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and product descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions ...

Page 3

... Each line interface is reduced to 1:1 coupling transformers, terminating resistors, and a capacitor. The Transmit Line Driver Monitor checks for a faulty transmitter or shorted output. In this document, “i” is used to represent the number of channels: NOTE (M28331 (M28332), and (M28333). Functional Block Diagram XOE LBO E3MODE ...

Page 4

... NRZRX DATA and CLK out Loss of Signal Code Violation Ordering Information Model Number Package M28331-3x 100-Pin ETQFP M28332-3x 100-Pin ETQFP M28333-3x 100-Pin ETQFP iv TX B3ZS/HDB3 analog out RX B3ZS/HDB3 analog in TX B3ZS/HDB3 analog out M28333 RX B3ZS/HDB3 analog in TX B3ZS/HDB3 analog out RX B3ZS/HDB3 analog in ...

Page 5

... AGC/VGA Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 Receive Equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2.3.3 The PLL Clock Recovery Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.4 Receive Loss Of Signal (RLOS) Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.5 B3ZS/HDB3 Decoder With Bipolar Violation Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.6 2.3.7 Data Squelching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.4 Jitter Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2.4.1 Jitter Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14 2.5 Additional M2833i Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15 2.5.1 Bias Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15 Power-On Reset (POR 2-15 2.5.2 Loopback Multiplexers (MUXes 2-15 2.5.3 28333-DSH-003 2-1 Mindspeed Technologies ™ v ...

Page 6

... B C-1 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 7

... M28331-3x Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Figure 1-2. M28332-3x Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Figure 1-3. M28333-3x Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Figure 2-1. Typical Application Of Single M2833i Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Figure 2-2. Pulse Shaper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Figure 2-3 ...

Page 8

... List of Figures viii Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 9

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit List of Tables Table 1-1. M2833i-3x Pin Definitions 1-5 Table 2-1. DS3 Transmit Template Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 Table 2-2. STS-1 Transmit Template Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 Table 2-3 ...

Page 10

... List of Tables x Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 11

... V) below ground. Additionally, driving TLINE, a forward-bias diode voltage above the VGG pin, creates a low impedance path from the TLINE pin to the VGG pin. Otherwise, the TLINE pins are high impedance. ™ Mindspeed Technologies 1-3 (M28333-3x) illustrate pin 1-1 ...

Page 12

... TLINEM 13 TMONM 14 TVDD 15 RVDD 16 RLINEP 17 RLINEM 18 RVSS 19 VSS VDD 25 1-2 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit M28331-3x ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 75 DVDDC 74 ENDECDIS RLOOP 71 LLOOP 70 RNEG/RLCV 69 RPOS/RNRZ 68 RCLK RLOS 67 66 RLOSMAX 65 RLOSTHR 64 RLOSMDIS 63 TAIS 62 TCLK TPOS/TNRZ 61 60 ...

Page 13

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 1-2. M28332-3x Pin Diagram TMON1P 1 TLINE1P 2 TLINE1M 3 TMON1M 4 TVDD1 5 RVDD1 6 RLINE1P 7 RLINE1M 8 RVSS1 9 VSS VDD 15 VDD VSS 19 TVSS2 20 TMON2P 21 TLINE2P 22 TLINE2M 23 TMON2M 24 TVDD2 25 28333-DSH-003-A M28332-3x ™ Mindspeed Technologies 1 ...

Page 14

... Pin Description 1.1 Pin Assignments Figure 1-3. M28333-3x Pin Diagram TMON1P 1 TLINE1P 2 TLINE1M 3 TMON1M 4 TVDD1 5 RVDD1 6 RLINE1P 7 RLINE1M 8 RVSS1 9 TVSS2 10 TMON2P 11 TLINE2P 12 TLINE2M 13 TMON2M 14 TVDD2 15 RVDD2 16 RLINE2P 17 RLINE2M 18 RVSS2 19 TVSS3 20 TMON3P 21 TLINE3P 22 TLINE3M 23 TMON3M 24 TVDD3 25 1-4 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit M28333-3x ™ Mindspeed Technologies M28331/M28332/M28333 (– ...

Page 15

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 17 — — — — — — — — — — 27 — — — — — — — — — ...

Page 16

... Pin Description 1.1 Pin Assignments Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 69 — — — — — — — — — — 41 — — — — — — — — 42 1-6 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ...

Page 17

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 61 — — — — — — — — — — 47 — — — — — — — — ...

Page 18

... Pin Description 1.1 Pin Assignments Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 66 — — 65 — — — — — — — — 37 — — — — — — — — 39 1-8 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ...

Page 19

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333- — — — — — — 28333-DSH-003-A Signal Name Description I/O/P Control Signals ENDECDIS Encoder/decoder I disable (for all channels) TAIS ...

Page 20

... Pin Description 1.1 Pin Assignments Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 55 — — — — — — — — — — — — — — — — — — — ...

Page 21

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 57 — — — — — — — — — — — — — — 100 100 — — ...

Page 22

... Pin Description 1.1 Pin Assignments Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 9, 20, 29, 10, 19 — 100 73 — — — — — — — — — — — — 1-12 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ...

Page 23

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 1-1. M2833i-3x Pin Definitions ( Pin # M28331-3x M28332-3x M28333-3x 11 — — — — — — — — — — 21 — — — — — — — — ...

Page 24

... Pin Description 1.1 Pin Assignments 1-14 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 25

... Functional Description 2.1 Overview The M28333 is a triple E3/DS3/STS-1 Line Interface Unit (LIU the physical layer interface between the data framer (or other terminal-side equipment) and the electrical cable used for data transmission. The M28333 LIU consists of three independent data transceivers that can operate over type 734/728 coaxial cable at the rates of 34 ...

Page 26

... Figure 2-1. Typical Application Of Single M2833i Channel 0–450 ft COAX TX (type 734/728) 0–450 ft COAX RX (type 734/728) 2-2 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-1 illustrates a typical application using the M2833i in a 0–450 ft COAX DSX (type 734/728) DSX ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) RX 0–450 ft COAX TX (type 734/728) 100604_012 28333-DSH-003-A ...

Page 27

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.2 Transmitter This section describes the detailed operation of the various blocks in the M2833i transmitter. 2.2.1 AMI B3ZS/HDB3 Encoder The ENDECDIS and E3MODE pins configure the encoder mode. When ENDECDIS = 0, the encoder is receiving non-encoded Nonreturn to Zero (NRZ) data on the TNRZ (TPOS) pin alone, and the NC (no connect) (TNEG) pin is ignored ...

Page 28

... Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit differential load. Driver gain accounts for the 6 dB illustrates the Pulse/Power template measurement points for the Pulse/Power Template for DS3/STS-1 0–450 ft COAX DSX (type 734/728) 0–450 ft COAX DSX ™ Mindspeed Technologies M28331/M28332/M28333 (–3x (type 734/728) 100604_013 28333-DSH-003-A ...

Page 29

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-4. Transmit Pulse Mask for DS3 Rates 1.2 1 0.8 0.6 0.4 0.2 0 -0.2 NOTE(S): An Isolated Pulse is a pulse preceded by at least two zeros and followed by one or more zeros. In judging the conformance of an isolated pulse to the mask permissable to do the following: 1 ...

Page 30

... T 0.36 0.36 T 1.4 NOTE(S): ( (System Clock Frequency) 2-6 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Transmit Pulse Mask for STS-1 Rates Normalized Symbol Time (1) Normalized Amplitude Equation Upper Curve 0.03 0. sin [( / 2)( 0.34)]} –2.4(T – 0.26) 0.1 + 0.61 e Lower Curve –0.03 –0. sin[( / 2)( 0.18)]} –0.03 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 31

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-6. Transmit Pulse Mask for E3 Rate 0.2 0.2 Volts 1.0 0.5 0.1 0.1 0.2 28333-DSH-003 0.1 14.55 ns 0.1 8.65 ns 12.1 ns 24.5 ns 29.1 ns Time Mindspeed Technologies 2.0 Functional Description 2.2 Transmitter ™ 500118a_1 2-7 ...

Page 32

... The AIS overwrites data during local loopback operation, it does not affect remote loopback operation. Figure 2-7. AIS Signal POSITIVE PULSE NEGATIVE PULSE TLINEP (output voltage) TLINEN (output voltage) 8333_009 2-8 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-7 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) illustrates the AIS signal. 28333-DSH-003-A ...

Page 33

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.2.5 Transmit Monitor Block The Transmit (TX) Monitor pins allow the M2833i to monitor for certain fault condition occurrences such as short circuits or defective channel output drivers in the device. The TX Monitor inputs (TMONP and TMONM) are independent functions where TMONP and TMONM must be externally connected (via 0- resistors or directly) to the TLINEP and TLINEM/N pins ...

Page 34

... For cases where a square-shaped DS3/STS-1 pulse (that does not meet the DS3/STS-1 standards) is transmitted to the receiver REQH can be set low (REQH = 0 mode, the REQH pin should always be set low (REQH = 0) to prevent over-equalization. 2-10 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 35

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.3.4 The PLL Clock Recovery Circuit The clock recovery circuit (RX PLL) extracts the embedded clock from the sliced data and provides this clock and the retimed data to the decoder (data mode). Upon startup (after the internal reset is deasserted), the RX PLL uses a reference clock (REFCLK) and a phase-frequency detector to lock to the correct data rate (reference mode) ...

Page 36

... RNRZ pin. (B3ZS and HDB3). These violations are passed data on the RNRZ pin. Bs since the last valid 0 substitution V (follows coding rule). These violations are passed data on the RNRZ pin. Section 2.9). Mindspeed Technologies M28331/M28332/M28333 (–3x) ™ 28333-DSH-003-A ...

Page 37

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.4 Jitter Tolerance The M2833i receiver is able to tolerate a specified amount of high-frequency jitter in the received signal while providing error-free operation (generally defined as a bit error rate of less than 10 Figure • E3 rate—ITU-T G.823 and ETSI TBR24 contain frequency masks for input NOTE: • ...

Page 38

... STS-1 rate. Figure 2-9. Maximum Jitter Transfer Curve Requirement 0.1 dB –19.9 dB STS-1 Category II DS3 Category I DS3 Category 2-14 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2-9. (Note: All slopes are 20 dB/decade) 100 Hz 1 kHz 10 kHz Jitter Frequency ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 100 kHz 100985_012 28333-DSH-003-A ...

Page 39

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.5 Additional M2833i Functions 2.5.1 Bias Generator To achieve good isolation between the channels, each channel utilizes an independent power and ground to both transmit and receive. Additionally, each channel has its own band gap voltage reference. Because only one external resistor for current generation exists, only one band gap voltage can be used ...

Page 40

... PDATA/ NDATA Pulse LINE Shaper DRIVER TCLK TX Monitor P PDATA Receiver Clock/ N NDATA Data Recovery DATCLK ALOS RLOSMAX RLOSTHR RLOSMDIS ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) TLINEP TLINEM/N TMONP TMONM TXMON TMONTST REFCLK RLINEP RLINEM/N REQH 28333-DSH-003-A ...

Page 41

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-11. Local Loopback XOE LBO E3MODE PDB TPOS TNEG Encoder TCLK TAIS RLOOP DATA MUX LLOOP RPOS RNEG RCLK RLOS DECODER 28333-DSH-003-A PDATA/ NDATA Pulse LINE Shaper DRIVER TCLK TX Monitor P PDATA Receiver Clock/ N NDATA ...

Page 42

... Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Dim. A See DETAIL Coplanarity ™ Mindspeed Technologies M28331/M28332/M28333 (–3x BOTTOM Millimeters Inches Min. Max. Min. Max. 1.20 MAX. 0.047 MAX. 0.05 0.15 0.002 0.006 0.95 1.05 0.004 0.041 15.75 16.25 0.620 0.640 13.90 14 ...

Page 43

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 2.7 Electrical Characteristics 2.7.1 Absolute Maximum Ratings Table 2-4. Absolute Maximum Ratings DVDDC/ RVDD/ TVDD/ VDD/ VGG VSOL FIT NOTE(S): 1. Stresses above those listed as absolute maximum ratings may cause permanent damage 28333-DSH-003-A Symbol Parameter ...

Page 44

... With 5 V logic input, VGG should be tied With 3.3 V logic input, VGG should be tied to 3 must be equal or greater than the power supply voltage. GG When VGG is operated at 5V, sequence VGG to DVDDC, RVDD, TVDD, and VDD as discussed in Appendix C:. Mindspeed Technologies M28331/M28332/M28333 (–3x) Required Minimum Observed 1,000 V 2,000 V 100 V 200 V 400 V 700 V ...

Page 45

... Line Input impedance TMONP, TMONM to 0.25 V Input voltage range TMONP, TMONM to ground Input pulse threshold (TMONP, TMONM) TLOS asserted Number of TCLKs with no input Power dissipation M28333 Total chip (–1x, –3x) Power dissipation Total chip (M28332) Power dissipation Total chip (M28331) NOTE(S): 1 ...

Page 46

... Tiwidth/Tisym, REFCLK — TPOS/TNRZ, TNEG, TAIS TPOS/TNRZ, TNEG, TAIS as pulse width, set-up time, hold time, and duty cycle. Figure 2-13, describes the logical relationship between various clock and data signals, and parameter values. Mindspeed Technologies M28331/M28332/M28333 (–3x) Min Nom Max — 29.10 — 22.35 19.29 45 — ...

Page 47

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure 2-13. Timing Diagram DATA OUTPUTS RCLK RPOS/RNRZ, RNEG/RLCV DATA INPUTS TCLK TPOS/TNRZ, TNEG, TAIS, 28333-DSH-003-A Todelay Tisetup Don't Care ™ Mindspeed Technologies 2.0 Functional Description 2.9 AC Characteristics Tosym Towidth Tisym Tiwidth Tihold Don't Valid Data Care ...

Page 48

... Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Conditions Min — 17.5 900 127 ± 20.1 1 pulses with less than 64 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) Nom Max Units 1.9 — V — — mV peak Diff. — — feet 22 — ...

Page 49

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table 2-10. Transmitter Specifications Parameter Output return loss (at cable 860–1,720 kHz interface using recommended 1,720–34,368 kHz ext. components) 34,368–51,550 kHz Output amplitude using test setup E3MODE = 1, E3 rate in Figure 2-14 ...

Page 50

... Table 2-11. Intrinsic Jitter Specifications (Receiver to Transmitter using Remote Loopback) Parameter DS3 Wideband 10 Hz-400 kHz DS3 Narrowband 30 kHz-400 kHz E3 Wideband 10 Hz-800 kHz E3 Narrowband 10 kHz-800 kHz 2-26 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Conditions Min ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) Nom Max Units 0.010 UI peak-peak 0.003 UI rms 0.002 UI peak-peak 0.001 UI rms ...

Page 51

... Applications The M28331/M28332/M28333 can be used in a variety of applications. Figure 3-1 M28333. The data and clock are extracted and passed on to the framer chip for further data manipulation and user interface important to employ high-frequency design techniques for the printed board layout. 3.1 PCB Design Considerations for the M2833i The M28333 is a mixed signal triple-port LIU device operating at frequencies ...

Page 52

... Other Passive Parts Mindspeed recommends the use of 1:1 transformers for coupling the BNC connectors to the device. The M28333 EVM uses six Pulse T3001 transformer devices to handle the 3 Tx and 3 Rx channels recommended that a 220 µF tantalum capacitor be used where the power enters the board ...

Page 53

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 3.1.6 Recommended Vendors Product: Transformers America Pulse Address: Corporate Office 12220 World Trade Drive San Diego, CA 92128 Telo: 858-674-8100 Fax: 858-674-8262 Northern Asia Pulse 3F-4, No. 81, Sec. 1 Hsin Tai Wu Road Hsi-Chih Tapei Hsien, Taiwan R.O.C. Telo: 886-2-26980228 ...

Page 54

... Channel 2 9 37.4 RLINEP RPOS RNEG RX RLINEN RCLK 9 37.4 BIAS RESET 9 BIAS RESET 12.1 K RBIAS Mindspeed Technologies M28331/M28332/M28333 (–3x) Type 728, 734, 735 9 75 Type 728, 734, 735 9 75 1:1 0.01 µF Type 728, 734, 735 9 75 Type 728, 734, 735 9 75 1:1 0.01 µF Type 728, 734, 735 9 ...

Page 55

... Systems: Common Generic Criteria” Hierarchical Digital Interfaces” Within Digital Networks Which are Based on the 2,048 kbps Hierarchy” Equipment Operating at the Primary Rate and Above” Unstructured and Structured Lease Lines; Attachment Requirements for Terminal Equipment Interface” ™ Mindspeed Technologies A-1 ...

Page 56

... Appendix A: Applicable Standards A-2 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 57

... PCB design for Mindspeed ETQFPs. 28333-DSH-003-A B Mindspeed recommends that the exposed paddle on the M28333–3x be soldered to the ground side of the PCB for reasons described below. Do not route PCB traces or vias under the exposed paddle area of the M28333–3x device. ...

Page 58

... PCB. package components. Figure B-1. Schematic Representation of the Package Components Lead Frame B-2 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure B-1 Mold Compound Lead Frame ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) illustrates the schematic of the Die Die Attach 100998_030 28333-DSH-003-A ...

Page 59

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit B.2 Package Thermal Characterization B.2.1 Heat Removal Path The internal heat removal path is designed to transfer heat from the top surface of the die to the die pad and then directly to the Printed Circuit Board (PCB) through a center solder pad. The PCB must have features designed to remove heat from the package efficiently ...

Page 60

... ETQFP, all thermal vias are located within the exposed region of the center pad. B-4 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Table B-1 lists the dimensions for the entire ETQFP package 5.40 0.50 0.25 14.40 0.65 0.35 14.40 0.50 0.25 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) ( 1.00 4.70 sq 1.00 6.50 sq 1.00 8.00 sq 28333-DSH-003-A ...

Page 61

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit B.2.3 PCB Design Thermal vias are the primary method of heat transfer from the PCB thermal land to the internal copper planes or to other heat removal sinks. The number, size, and construction of the vias is important in obtaining the best package thermal performance and package/PCB assembly ...

Page 62

... Cu Coverage (power/ground layer) Inner Cu Thickness (spec) B-6 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit = 1.40 mm Air Flow Drawing Number TR03-T1 1.6 mm 100 3.5 Drawing Number TR03-T2 1 3.5 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) Figure B-5 illustrates the = 1.60 mm 100998_027a Table B-2 lists specifications of FR-4 1S0P 10% FR-4 1S2P 10% 100% 28333-DSH-003-A ...

Page 63

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit B.2.5 Package Thermal Performance B.2.5.1 Calculation Maximum junction temperature can be calculated as: Guidelines T Where B.2.5.2 Package Delco thermal test chips are used to estimate package thermal performance. Thermal Resistance Table B-4 Table B-4. Specification for Delco Thermal Test Chips Dimensions 3 ...

Page 64

... Air Flow Velocity (LFM) Two Layer PCB Four Layer PCB Six Layer PCB 150 200 250 300 350 400 Air Flow Velocity (LFM) ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) Figures B-6 through B-8. 80 ETQFP 7 7 9.50 mm 450 500 100998_032 450 500 100998_033 ...

Page 65

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit B.3 Solder Stencil Determination Use the thickest possible solder mask, consistent with the components being assembled to the PWB surface mount process. A standoff height of 2.0–4.2 mils provides good solder joints for both the leads and the center pad. This is achieved using a stencil thickness mils ...

Page 66

... Peak temperature should be approximately 220 ˚C, and the exposure time should normally be less than 1.0 minutes at temperature above 183 ˚C. B-10 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit 1.2 1.9 2.5 Seconds Over 183: 48 ZONE SETPOINTS 125 115 110 190 190 160 10 260 ™ Mindspeed Technologies M28331/M28332/M28333 (–3x 3.1 3.7 4.4 Time 7 8 190 100998_025 28333-DSH-003-A ...

Page 67

... M28331/M28332/M28333 (–3x) Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit Figure B-10. Typical Forced Convection Reflow Profile for Eutectic Sn63:Pb37 File = SMOLE42 TWO2 - D675-001 2470 MAXIMA X Deg. 1= 221 236 225 236 227 232.3 1700 4 = 226 233.3 MAX SLOPES X Deg./Point 1= 27 4.4 920 6 6 ...

Page 68

... Appendix B: Exposed Thin Quad Flat (ETQFP) Pack B.4 Solder Reflow Profile B-12 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 69

... VGG can exceed VDD (±10%) for short durations of less than 10 ms. VGG must never be less than VDD by more than 0.5V. 3.6V Max. 3.6V Max. 0.5V Max. 3.6V Max. 0.5V Max. 3.6V Max. Time VGGmax 3.6V Max. VDD VGGmin 0.5V Max. 3.6V Max. 5.5V Max. VSS Time ™ Mindspeed Technologies VGGmax VDD VGGmin 5.5V Max. VSS 3.6V Max. 3.6V Max. 0.5V Max. C-1 ...

Page 70

... Appendix C: Power Sequencing C-2 Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit ™ Mindspeed Technologies M28331/M28332/M28333 (–3x) 28333-DSH-003-A ...

Page 71

General Information: U.S. and Canada: (800) 854-8099 International: (949) 483-6996 Headquarters - Newport Beach 4311 Jamboree Rd. P.O. Box C Newport Beach, CA. 92658-8902 ...

Related keywords