lf3312 LOGIC Devices Incorporated, lf3312 Datasheet - Page 29

• Manufacturer Part Number: lf3312
• Description: 12-mbit Frame Buffer / Fifo
• Manufacturer: LOGIC Devices Incorporated

AOUT
BOUT
Random Access Write Pointer ‘Jump’ Timing
Output Enable and Disable
Jumping/Setting Pointers based on Configuration Register Address after Remapping Process
ADDR
DEVICES INCORPORATED
LOGIC Devices Incorporated
1
2
3
4
WEN is LOW for 3 rising edges of WCLK prior to LOAD transition. It stays LOW for the minimum required 5 rising edges after the LOAD transition.
The configuration registers are programmed while LOAD is LOW. The LOAD transition triggers the address remap process.
WSET can be brought LOW (edge "3") 3 rising edges of WCLK after the LOAD transition, jumping the write pointer to the address programmed into the WADR register.
RSET can be brought LOW (edge "7") 7 rising edges of RCLK after the LOAD transition, jumping the read pointer to the address programmed into the RADDR register.
D[11:0]
WSET
RSET
AOE
BOE
WCLK
LOAD
WCLK
WSET
11–0
11–0
WEN
23–0
SET and RSET programmed to be level sensitive
WEN= LOW WADDRSEL= HIGH
NOTE: SET programmed to be falling edge sensitive
NOTE: Rising edge of WCLK labeled "1" writes data on D to 24bit Address "A"
2
3
4
1
(n)
(n+1)
t
RWH
OPMODE[2:0]=001
t
RWS
t
DS
A
1
(A)
23-0
1
t
DH
2
(A+1)
t
RWS
t
3
DIS
29
t
RWH
(A+2)
4
HIGH IMPEDANCE
5
t
RWH
(A+3)
12-Mbit Frame Buffer / FIFO
6
Preliminary Datasheet
t
RWS
t
ENA
(A+4)
Video Imaging Product
7
t
RWH
August 8, 2006 LDS.3312 O
LF3312