lf3312 LOGIC Devices Incorporated, lf3312 Datasheet - Page 22

• Manufacturer Part Number: lf3312
• Description: 12-mbit Frame Buffer / Fifo
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
LOGIC Devices Incorporated
Configuration Register Definitions
Register 9[2:0] = FLAG_SET[2:0] - sets fractional “Fullness” and “Empti-
ness”Thresholds for Programmable Empty/Full Flags.
Full flag goes HIGH when the memory is more than “TH” full. Empty flag goes
HIGH when the memory is less than or equal to “TL” full.
000
001
010
011
100
101
110
111
Register A[7] = BSET_catch - (OPMODES 4-7 only)
0:
1:
Register A[6] = ASET_catch - (all OPMODES) logic same as above for BSET_catch
Register A[5:0] Control action.
Rb[5]
Rb[4]
Rb[3]
Rb[2]
Rb[1]
Rb[0]
if 0:
if 1:
TH = 79/81 (dflt)
TH = 78/81
TH = 77/81
TH = 76/81
TH = 75/81
TH = 74/81
TH = 73/81
TH = 72/81
setting write pointer B does not mark its new value (dflt)
setting write pointer B automatically marks its new value
RSET_b_sel
RCLR_b_sel
BSET_b_sel
BCLR_b_sel
ASET_b_sel
ACLR_b_sel
Each falling edge on the corresponding control pin overrides a
memory address counter for exactly one clock cycle, after which
normal memory address incrementing immediately resumes. (dflt)
The corresponding pin continuously overrides the memory address
counter as long as it is held LOW. Memory address incrementing
resumes when the pin is returned HIGH.
22
TL = 1/81 (dflt)
TL = 2/81
TL = 3/81
TL = 4/81
TL = 5/81
TL = 6/81
TL = 7/81
TL = 8/81
12-Mbit Frame Buffer / FIFO
Preliminary Datasheet
Video Imaging Product
August 8, 2006 LDS.3312 O
LF3312