mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 72
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
FPROT register reflect the active protection scenario. See the FPHS and FPLS descriptions for additional
restrictions.
2.3.2.7
The banked FSTAT register defines the operational status of the module.
CBEIF, PVIOL, and ACCERR are readable and writable, CCIF and BLANK are readable and not writable,
remaining bits read 0and are not writable in normal mode. FAIL is readable and writable in special mode.
FAIL must be clear when starting a command write sequence.
72
Reset
Reset
W
W
R
R
CBEIF
CBEIF
Flash Status Register (FSTAT)
7
1
7
1
1
Allowed transitions marked with X.
Protection
Scenario
From
= Unimplemented or Reserved
= Unimplemented or Reserved
0
1
2
3
4
5
6
7
Figure 2-10. Flash Status Register (FSTAT - Normal Mode)
Figure 2-11. Flash Status Register (FSTAT - Special Mode)
CCIF
CCIF
6
1
6
1
Table 2-15. Flash Protection Scenario Transitions
X
X
0
PVIOL
PVIOL
MC9S12HZ256 Data Sheet, Rev. 2.05
5
0
5
0
1
X
X
X
X
ACCERR
ACCERR
X
X
X
X
2
To Protection Scenario
4
0
4
0
X
X
X
X
X
X
X
X
3
3
0
0
3
0
0
X
X
X
X
4
1
5
X
X
BLANK
BLANK
2
0
2
0
X
X
6
Freescale Semiconductor
FAIL
X
7
1
0
0
1
0
0
0
0
0
0
0
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