mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 354

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.3.2.15 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
354
Reset:
W
R
TXERR7
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
0
7
Figure 12-16. MSCAN Transmit Error Counter (CANTXERR)
TXERR6
= Unimplemented
6
0
MC9S12HZ256 Data Sheet, Rev. 2.05
TXERR5
0
5
TXERR4
NOTE
4
0
TXERR3
0
3
TXERR2
2
0
TXERR1
Freescale Semiconductor
0
1
TXERR0
0
0

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