mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 603

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 22
Module Mapping Control (MMCV4)
22.1
Introduction
This section describes the functionality of the module mapping control (MMC) sub-block of the S12 core
platform.
The block diagram of the MMC is shown in
Figure
22-1.
MMC
MMC_SECURE
SECURE
SECURITY
BDM_UNSECURE
STOP, WAIT
ADDRESS DECODE
READ & WRITE ENABLES
REGISTERS
CLOCKS, RESET
PORT K INTERFACE
INTERNAL MEMORY
MODE INFORMATION
EXPANSION
MEMORY SPACE SELECT(S)
PERIPHERAL SELECT
EBI ALTERNATE ADDRESS BUS
CORE SELECT (S)
EBI ALTERNATE WRITE DATA BUS
EBI ALTERNATE READ DATA BUS
ALTERNATE ADDRESS BUS (BDM)
ALTERNATE WRITE DATA BUS (BDM)
BUS CONTROL
CPU ADDRESS BUS
CPU READ DATA BUS
ALTERNATE READ DATA BUS (BDM)
CPU WRITE DATA BUS
CPU CONTROL
Figure 22-1. MMC Block Diagram
The MMC is the sub-module which controls memory map assignment and selection of internal resources
and external space. Internal buses between the core and memories and between the core and peripherals is
controlled in this module. The memory expansion is generated in this module.
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
603