mc9s08dz32amlfr Freescale Semiconductor, Inc, mc9s08dz32amlfr Datasheet - Page 65

• Manufacturer Part Number: mc9s08dz32amlfr
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

address of the FLASH memory location to be addressed. When accessing data using LBP, the contents of
LAP2:LAP0 will increment after the read or write is complete.
Accessing LBP does the same thing as accessing LWP. The MMU register ordering of LWP followed by
LBP, allow the user to access data by words using the LDHX or STHX instructions with the address of the
LWP register.
4.4.3.5
This register is one of three data registers that the user can use to access any FLASH memory location in
the extended address map. When LB is accessed the contents of LAP2:LAP0 make up the extended
address of the FLASH memory location to be addressed.
4.4.3.6
The user can increase or decrease the contents of LAP2:LAP0 by writing a 2s complement value to
LAPAB. The value written will be added to the current contents of LAP2:LAP0.
Freescale Semiconductor
D7:D0
D7:D0
Field
Field
7:0
7:0
Reset:
Reset:
W
W
R
R
Reads of this register will first return the data value pointed to by the linear address pointer, LAP2:LAP0 and then
will increment LAP2:LAP0. Writes to this register will first write the data value to the memory location specified
by the linear address pointer and then will increment LAP2:LAP0. Writes to this register are most commonly used
when writing to the FLASH block(s) during programming.
Reads of this register returns the data value pointed to by the linear address pointer, LAP2:LAP0. Writes to this
register will write the data value to the memory location specified by the linear address pointer. Writes to this
register are most commonly used when writing to the FLASH block(s) during programming.
Linear Byte Register (LB)
Linear Address Pointer Add Byte Register (LAPAB)
D7
D7
0
0
7
7
Table 4-9. Linear Byte Post Increment Register Field Descriptions
Figure 4-8. Linear Byte Post Increment Register (LBP)
Table 4-10. Linear Data Register Field Descriptions
D6
D6
0
0
6
6
Figure 4-9. Linear Byte Register (LB)
MC9S08DZ128 Series Data Sheet, Rev. 1
D5
D5
5
0
5
0
D4
D4
0
0
4
4
Description
Description
D3
D3
0
0
3
3
D2
D2
0
0
2
2
D1
D1
0
0
1
1
Chapter 4 Memory
D0
D0
0
0
0
0
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