xcf32pvo48m Xilinx Corp., xcf32pvo48m Datasheet - Page 3

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xcf32pvo48m

Manufacturer Part Number
xcf32pvo48m
Description
< B L Qpro Extended Temperature Platform Flash In-system Programmable Configuration Prom
Manufacturer
Xilinx Corp.
Datasheet

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Programming
In-System Programming
In-System Programmable PROMs can be programmed
individually, or two or more can be daisy-chained together
and programmed in-system via the standard 4-pin JTAG
protocol as shown in
offers quick and efficient design iterations and eliminates
unnecessary package handling or socketing of devices. The
programming data sequence is delivered to the device
using either Xilinx iMPACT software and a Xilinx download
cable, a third-party JTAG development system, a
JTAG-compatible board tester, or a simple microprocessor
interface that emulates the JTAG instruction sequence. The
iMPACT software also outputs serial vector format (SVF)
files for use with any tools that accept SVF format, including
automatic test equipment. During in-system programming,
the CEO output is driven High. All other outputs are held in
a high-impedance state or held at clamp levels during
in-system programming. In-system programming is fully
supported across the recommended operating voltage and
temperature ranges.
Table 3: XQF32P Design Revision Data Security Options
DS541 (v1.0) November 27, 2006
Product Specification
Reset (default)
Reset (default)
Set
Set
Figure 2: JTAG In-System Programming Operation
Read Protect
(b) Program Using Download Cable
R
(a)
(a) Solder Device to PCB
Figure
QPro Extended Temperature Platform Flash In-System Programmable Configuration PROM
2. In-system programming
(b)
Reset (default)
Reset (default)
Write Protect
Set
Set
DS541_02_111706
www.xilinx.com
External Programming
Xilinx reprogrammable PROMs can also be programmed by
the Xilinx MultiPRO Desktop Tool or a third-party device
programmer. This provides the added flexibility of using
pre-programmed devices with an in-system programmable
option for future enhancements and design changes.
Reliability and Endurance
Xilinx in-system programmable products provide a
guaranteed endurance level of 20,000 in-system
program/erase cycles and a minimum data retention of 20
years. Each device meets all functional, performance, and
data retention specifications within this endurance limit.
Design Security
The Xilinx in-system programmable Platform Flash PROM
devices incorporate advanced data security features to fully
protect the FPGA programming data against unauthorized
reading via JTAG. The XQF32P PROMs can also be
programmed to prevent inadvertent writing via JTAG.
Table 3
XQF32P PROM.
Read Protection
The read protect security bit can be set by the user to
prevent the internal programming pattern from being read or
copied via JTAG. Read protection does not prevent write
operations. For the XQF32P PROM the read protect
security bit can be set for individual design revisions, and
resetting the read protect bit requires erasing the particular
design revision.
Write Protection
The XQF32P PROM device also allows the user to write
protect (or lock) a particular design revision to prevent
inadvertent erase or program operations. Once set, the
write protect security bit for an individual design revision
must be reset (using the UNLOCK command followed by
ISC_ERASE command) before an erase or program
operation can be performed.
Read/Verify
Inhibited
shows the security settings available for the
Program Inhibited
Erase Inhibited
3

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