m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 284

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Figure 2.16.1. State transition diagram of power control mode
Transition of stop mode, wait mode
Transition of normal mode
CM06 = “0”
(Notes 1,3)
Main clock is oscillating
Sub clock is oscillating
Medium-speed mode
CM07 = “0” CM06 = “0”
CM17 = “0” CM16 = “0”
CM07 = “0” CM06 = “0”
CM17 = “1” CM16 = “0”
(divided-by-4 mode)
All oscillators stopped
All oscillators stopped
All oscillators stopped
High-speed mode
BCLK : f(X
BCLK : f(X
Stop mode
Stop mode
Stop mode
Note 1: Switch clock after oscillation of main clock is sufficiently stable.
Note 2: Switch clock after oscillation of sub clock is sufficiently stable.
Note 3: Change CM06 after changing CM17 and CM16.
Note 4: Transit in accordance with arrow.
CM06 = “1”
CM04 = “0”
Medium-speed mode
(divided-by-4 mode)
CM07 = “0” CM06 = “0”
CM17 = “0” CM16 = “0”
CM07 = “0” CM06 = “0”
CM17 = “1” CM16 = “0”
IN
IN
High-speed mode
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)/4
)
BCLK : f(X
BCLK : f(X
CM04 = “0”
Interrupt
Main clock is oscillating
Main clock is oscillating
Medium-speed mode
Medium-speed mode
Medium-speed mode
(divided-by-16 mode)
(divided-by-8 mode)
CM07 = “0” CM06 = “1”
(divided-by-2 mode)
CM07 = “0” CM06 = “0”
CM17 = “0” CM16 = “1”
CM07 = “0” CM06 = “0”
CM17 = “1” CM16 = “1”
Sub clock is stopped
Sub clock is stopped
IN
CM10 = “1”
CM10 = “1”
CM10 = “1”
Interrupt
Interrupt
IN
)/4
)
BCLK : f(X
BCLK : f(X
BCLK : f(X
Medium-speed mode
Medium-speed mode
(divided-by-16 mode)
IN
CM07 = “0” CM06 = “0”
CM17 = “0” CM16 = “1”
CM07 = “0” CM06 = “0”
CM17 = “1” CM16 = “1”
(divided-by-2 mode)
IN
IN
CM04 = “1”
(Notes 1, 3)
)/16
)/8
)/2
BCLK : f(X
Low-speed/low power
BCLK : f(X
Medium-speed mode
High-speed/medium-
(divided-by-8 mode)
(Refer to the following for the transition of normal mode.)
dissipation mode
Normal mode
speed mode
Reset
CM04 = “1”
Medium-speed mode
(divided-by-8 mode)
IN
IN
)/16
)/2
BCLK : f(X
CM07 = “0”
CM06 = “1”
CM07 = “0” (Note 1)
CM06 = “0” (Note 3)
IN
)/8
WAIT
instruction
WAIT
instruction
WAIT
instruction
Interrupt
Interrupt
Interrupt
CM07 = “1” (Note 2)
CM05 = “1”
CM07 = “0”
(Note 1, 3)
CM07 = “1”
(Note 2)
CM07 = “0” (Note 1)
CM06 = “1”
CPU operation stopped
CPU operation stopped
CPU operation stopped
Wait mode
Wait mode
Wait mode
Low power dissipation mode
CM05 = “0”
Main clock is oscillating
Sub clock is oscillating
Sub clock is oscillating
Main clock is stopped
Low-speed mode
BCLK : f(X
BCLK : f(X
CM07 = “1”
CM07 = “1”
2. Power Control
CIN
CIN
CM05 = “1”
)
)