m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 252

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Figure 2.10.3. DMAC-related registers (2)
DMA2 request cause select register (Note 1)
DMA3 request cause select register (Note 1)
b7
b7
b6
b6
b5
b5
b4
b4
b3
b3
page 243 of 354
b2
b2
b1
b1
b0
b0
Note 1: Software is always enabled.
Note 2: SSI=Serial sound interface
Note 3: This value should not be set.
Note 1: Software is always enabled.
Note 2: SSI=Serial sound interface
Note 3: This value should not be set.
Nothing is assigned. Write “0” when writing to these bits. The value is “0” when read.
Nothing is assigned. Write “0” when writing to these bits. The value is “0” when read.
Bit Symbol
Bit Symbol
DSEL0
DSEL1
DSEL2
DSEL3
DSEL4
DSEL0
DSEL1
DSEL2
DSEL3
DSEL4
DSR
DSR
Symbol
DM2SL
Symbol
DM3SL
Software DMA
request bit
Software DMA
request bit
DMA request
cause select bits
DMA request
cause select bits
Bit Name
Bit Name
b4 b3 b2 b1 b0
0 0 0 0 0 : DMA Disabled
0 0 0 0 1 : INT2 (falling edge)
0 0 0 1 0 : INT2 (two edges)
0 0 0 1 1 : USB2
0 0 1 0 0 : Timer A0
0 0 1 0 1 : Timer A1
0 0 1 1 0 : Timer A2
0 0 1 1 1 : Timer A3
0 1 0 0 0 : Timer A4
0 1 0 0 1 : UART0 receive/ACK/SSI0 receive
0 1 0 1 0 : UART1 receive/ACK/SSI1 receive
0 1 0 1 1 : UART2 receive/ACK
0 1 1 0 0 : UART3 receive/ACK
0 1 1 0 1 : UART0 transmit/NACK/SSI0 transmit
0 1 1 1 0 : UART1 transmit/NACK/SSI1 transmit
0 1 1 1 1 : UART2 transmit/NACK
1 0 0 0 0 : UART3 transmit/NACK
1 0 0 0 1 : A/D
1 0 0 1 0 : DMA0
1 0 0 1 1 : DMA1
1 0 1 0 0 : Disabled (Note 3)
1 0 1 0 1 : DMA3
1 0 1 1 0 : Disabled (Note 3)
1 0 1 1 1 : Disabled (Note 3)
1 1 x x x : Disabled (Note 3)
b4 b3 b2 b1 b0
0 0 0 0 0 : DMA Disabled
0 0 0 0 1 : INT0 (falling edge)
0 0 0 1 0 : INT0 (two edges)
0 0 0 1 1 : USB3
0 0 1 0 0 : Timer A0
0 0 1 0 1 : Timer A1
0 0 1 1 0 : Timer A2
0 0 1 1 1 : Timer A3
0 1 0 0 0 : Timer A4
0 1 0 0 1 : UART0 receive/ACK/SSI0 receive
0 1 0 1 0 : UART1 receive/ACK/SSI1 receive
0 1 0 1 1 : UART2 receive/ACK
0 1 1 0 0 : UART3 receive/ACK
0 1 1 0 1 : UART0 transmit/NACK/SSI0 transmit
0 1 1 1 0 : UART1 transmit/NACK/SSI1 transmit
0 1 1 1 1 : UART2 transmit/NACK
1 0 0 0 0 : UART3 transmit/NACK
1 0 0 0 1 : A/D
1 0 0 1 0 : DMA0
1 0 0 1 1 : DMA1
1 0 1 0 0 : DMA2
1 0 1 0 1 : Disabled (Note 3)
1 0 1 1 0 : Disabled (Note 3)
1 0 1 1 1 : Disabled (Note 3)
1 1 x x x : Disabled (Note 3)
Address
Software trigger is always enabled
Write “1” to trigger DSR bit.
Address
Software trigger is always enabled
Write “1” to trigger DSR bit.
03B2
03B0
16
16
Function (Note 2)
Function (Note 2)
When reset
When reset
00
00
16
16
O O
O O
O O
O O
O O
_ _
O O
O O
O O
O O
O O
O O
_ _
O O
R W
R W
2. DMAC