w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 79

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w83627sf

Manufacturer Part Number
w83627sf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
Bit 7: This bit reflects the complement of the Busy input.
Bit 6: This bit reflects the nAck input.
Bit 5: This bit reflects the PError input.
Bit 4: This bit reflects the Select input.
Bit 3: This bit reflects the nFault input.
Bit 2-0: These three bits are not implemented and are always logic one during a read.
6.3.4 Device Control Register (DCR)
The bit definitions are as follows:
Bit 6, 7: These two bits are logic one during a read and cannot be written.
Bit 5: This bit has no effect and the direction is always out if mode = 000 or mode = 010. Direction is
Bit 4: Interrupt request enable. When this bit is set to a high level, it may be used to enable interrupt
Bit 3: This bit is inverted and output to the SLIN# output.
Bit 2: This bit is output to the INIT# output.
Bit 1: This bit is inverted and output to the AFD# output.
Bit 0: This bit is inverted and output to the STB# output.
valid in all other modes.
0
1
requests from the parallel port to the CPU due to a low to high transition on the ACK# input.
0
1
the parallel port is in output mode.
the parallel port is in input mode.
The printer is not selected.
The printer is selected.
7
1
6
1
5
4
3
2
- 72 -
1
0
strobe
autofd
nInit
SelectIn
ackIntEn
Direction
Publication Release Date: Nov. 2000
PRELIMINARY
W83627SF
Revision 0.60

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