w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 102

• Manufacturer Part Number: w83627sf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

11.4 Interrupt Status Register (ISR, read only at "base address + 2")
This register reflects the Smart Card interface interrupt status, which is encoded by different interrupt
sources into 4 bits.
Bit 7, 6: These two bits are set to a logical 1 when SFR bit 0 = 1.
Bit 5: Reflect value of SCPSNT line status.
Bit 4: Set to 1 if SCPSNT toggles when this type of interrupt is enabled. Bit 0 of this register is also set
Bit 3 - 1: These three bits identify the priority level of the pending interrupt, as shown in the table below.
Bit 0: This bit is a logical 1 if there is no interrupt pending. If one of the interrupt sources has occurred,
INTERRUPT CONTROL FUNCTION
Bit
3
0
0
0
1
0
this bit will be set to a logical 0.
to 0 if this type of interrupt occurs.
Bit
2
0
1
1
1
0
ISR
Bit
1
0
1
0
0
1
7
Bit
0
1
0
0
0
0
6
Interrupt
priority
First
Second
Second
Third
5
-
4
Interrupt Type
Smart Card
interface Receive
Status
RBR Data Ready
FIFO Data Timeout
TBR Empty
3
2
-
1
INTERRUPT SET AND FUNCTION
0
Interrupt Source
No Interrupt pending
1. OER = 1
3. NSER = 1 4. SBD = 1
1. RBR data ready
2. FIFO interrupt active level
Data present in RX FIFO for 4
characters period of time since
last access of RX FIFO.
TBR empty
No interrupt pending
Interrupt status bit 0
Interrupt status bit 0
Interrupt status bit 0
SCPSNT toggle Interrupt (SCPTI)
SCPSNT line status
FIFO enabled
FIFO enabled
- 95 -
reached
2. PBER =1
Publication Release Date: Nov. 2000
Clear Interrupt
Read SCSR
1. Read RBR
2. Read RBR until FIFO
data under active level
Read RBR
1. Write data into TBR
2. Read ISR (if priority is
third)
PRELIMINARY
W83627SF
Revision 0.60
-