w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 70

• Manufacturer Part Number: w83627sf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

5.1.10 Bank1.Reg2 - Version ID Regiister I (VID)
Power on default <7:0> = 0001,0000 binary
5.1.11 Bank0~3.Reg3 - CIR Control Register 0/Bank Select Register (CTR0/BSR) (BANK0~3)
This register is defined same as in Bank0.Reg3.
5.1.12 Bank1.Reg4 - Timer Low Byte Register (TMRL)
Power on default <7:0> = 0000,0000 binary
5.1.13 Bank1.Reg5 - Timer High Byte Register (TMRH)
Power on default <7:0> = 0000,0000 binary
7-0
7-0
7-4
3-0
Bit
Bit
Bit
VID
TMRL
Reserved
TMRH
Name
Name
Name
Read/Write
Read Only
Read/Write
Read/Write
Read/Write
Read/Write
Version ID, default is set to 0x10.
Timer Low Byte Register. This is a 12-bit timer (another 4-
bit is defined in Bank1.Reg5) which resolution is 1 ms, that
is, the programmed maximum time is 2
is a down-counter. The timer start down count when the bit
EN_TMR (Enable Timer) of Bank0.Reg2. is set to 1. When
the timer down count to zero and EN_TMR=1, the TMR_I is
set to 1. When the counter down count to zero, a new
initial value will be re-loaded into timer counter.
Reserved.
Timer High Byte Register. See Bank1.Reg4.
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Description
Description
Description
Publication Release Date: Nov. 2000
PRELIMINARY
W83627SF
12
-1 ms. The timer
Revision 0.60