w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 30

• Manufacturer Part Number: w83627sf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

3. FDC FUNCTIONAL DESCRIPTION
3.1
The floppy disk controller of the W83627SF integrates all of the logic required for floppy disk control. The
FDC implements a PC/AT or PS/2 solution. All programmable options default to compatible values. The
FIFO provides better system performance in multi-master systems. The digital data separator supports
up to 2 M bits/sec data rate.
The FDC includes the following blocks: AT interface, Precompensation, Data Rate Selection, Digital
Data Separator, FIFO, and FDC Core.
3.1.1
The interface consists of the standard asynchronous signals: RD#, WR#, A0-A3, IRQ, DMA control, and
a data bus. The address lines select between the configuration registers, the FIFO and control/status
registers. This interface can be switched between PC/AT, Model 30, or PS/2 normal modes. The PS/2
register sets are a superset of the registers found in a PC/AT.
3.1.2
The FIFO is 16 bytes in size and has programmable threshold values.
information and disk data transfers go through the FIFO. Data transfers are governed by the RQM and
DIO bits in the Main Status Register.
The FIFO defaults to disabled mode after any form of reset.
compatibility. The default values can be changed through the CONFIGURE command. The advantage of
the FIFO is that it allows the system a larger DMA latency without causing disk errors. The following
tables give several examples of the delays with a FIFO. The data are based upon the following formula:
W83627SF FDC
AT interface
FIFO (Data)
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Publication Release Date: Nov. 2000
This maintains PC/AT hardware
All command parameter
PRELIMINARY
W83627SF
Revision 0.60