lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 9

• Manufacturer Part Number: lan91c100
• Description: Feast ? Ast Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

PQFP/TQFP
PIN NO.
25,26,
20,21,
28,29
22,24
195
194
30
19
12
18
17
1
6
9
DESCRIPTION OF PIN FUNCTIONSOF PIN FUNCTIONSPIN FUNCTIONS
nLink Status nLNK
nFullstep
MII Select
AUI Select
Transmit
Enable 100
Mbps
Carrier 100
Mbps
Receive
Data Valid
Collision
Detect 100
Mbps
Transmit
Data
Transmit
Clock
Receive
Clock
Receive
Data
NAME
nFSTEP
MIISEL
AUISEL
TXEN100
CRS100
RX_DV
COL100
TXD0-TXD3
TX25
RX25
RXD0-
RXD3
SYMBOL
BUFFER
TYPE
O4
O4
O4
O4
O4
IP
IP
ID
ID
IP
IP
I
9
Input. General purpose input port used to
convey LINK status (EPHSR bit 14).
Independent of port selection (MIISEL=X).
Output. Non volatile output pin. Driven by
inverse of FULLSTEP (CONFIG bit 10).
Independent of port selection (MII SEL=X).
Output. Non volatile output pin. Driven by
MII
indicates the MII port is selected, low
indicates the 10 Mbps ENDEC is selected.
Output. Non volatile output pin. Driven by
AUI SELECT (CONFIG bit 8). Independent
of port selection (MIISEL=X).
Output to MII PHY. Envelope to 100 Mbps
transmission. This pin stays low if MIISEL is
low.
Input from MII PHY.
reception used for deferral and backoff
purposes. This pin is ignored when MIISEL
is low.
Input from MII PHY. Envelope of data valid
reception. Used for receive data framing.
This pin is ignored when MIISEL is low.
Input from MII PHY.
input. This pin is ignored when MIISEL is
low.
Outputs. Transmit Data nibble to MII PHY.
Input. Transmit clock input from MII. Nibble
rate clock (25 MHz). This pin is ignored
when MIISEL is low.
Input. Receive clock input from MII PHY.
Nibble rate clock. This pin is ignored when
MIISEL is low.
Inputs. Received Data nibble from MII PHY.
These pins are ignored when MIISEL is low.
SELECT
DESCRIPTION
(CONFIG
Envelope of packet
Collision detection
bit
15).
High