lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 35
lan91c100
Manufacturer Part Number
lan91c100
Description
Feast ? Ast Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN91C100.pdf
(101 pages)
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Note: When an EEPROM access is in progress
the STORE and RELOAD bits will be read back
as high. The remaining 14 bits of this register
will be invalid. During this time attempted
read/write operations, other than polling the
35
EEPROM status, will NOT have any effect on
the internal registers.
accesses to the LAN91C100 after both bits are
low. A worst case RELOAD operation initiated
by RESET or by software takes less than
750 sec.
The CPU can resume