mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 75

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

DESCRIPTION
real time level and device Identification. They are obtained
using the following commands.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 36. Device Flag, I/O real time and Device Identification
The table below is the summary of the device flags, I/O
This command is composed of the following:
MOSI
MISO
REG
CAN
LIN1
LIN2
Bits
INT
I/O
bits [15,
15-14
14]
11
11
11
11
00
11
00
11
11
8 Bits Device Fixed Status
MOSI bits 15-7
Address
Interrupt
Interrupt
(bits 15...8)
0_1111
1_0000
1_0001
1_0001
1_0010
1_0010
1_0011
1_0100
[13-9]
LIN 1
LIN 2
REG
13-9
CAN
I/O
I/O
bit 8
8
1
1
1
1
1
1
1
1
Hexa SPI commands to get I/O Flags and I/O wake up: MOSI Ox E3 00, and MOSI Ox E3 80
bit
7
0
1
0
1
0
1
1
0
1
1
0
0
Hexa SPI commands to get Vreg Flags: MOSI Ox DF 00, and MOSI Ox DF 80
Hexa SPI commands to get CAN Flags: MOSI Ox E1 00, and MOSI Ox E1 80
Hexa SPI commands to get INT Flags: MOSI Ox E5 00, and MOSI Ox E5 80
HS3 short to
INT request
Vdd (5V or
V
7
CAN_UF
wake-up
wake-up
I/O-1-3
AUX
3.3V)
GND
bit 7
CAN
MISO bit [7-0] = 1011 0001: MC33904, 5V version, silicon pass 3.0
MISO bit [7-0] = 1011 0010: MC33904, 5V version, silicon pass 3.1
Hexa SPI commands to get device Identification: MOSI Ox 25 10
-
-
-
-
Hexa SPI commands to get I/O real time level: MOSI Ox 23 00
_low
Hexa SPI commands to get LIN 2 Flags: MOSI Ox E7 00
Hexa SPI commands to get LIN 2 Flags: MOSI Ox E9 00
I/O-0-2 wake-
HS2 short to
V
RST high
AUX
wake up
wake up
CAN_F
current
device
GND
I/O-3
state
p/n 1
LIN1
LIN2
bit 6
up
6
_over-
-
-
-
FLAGS
SPI wake-up
DBG resistor
MISO bits [7-0], device response on MISO terminal
short to gnd
short to gnd
CAN Over-
LIN1 Term
LIN2 Term
shutdown
SPI parity
5V-can_
Thermal
Next 6 MOSI bits (bits 6.0) should be “000_0000”
to V
device
CANL
temp
error
p/n 0
bit 5
5
-
-
BAT
status or device identification.
• bit 13 to 9 are the register address from which the flags is
• bit 8 = 1 (this is not parity bit function, as this is a read
bits 15 and 14: [1 1] for failure flags, or [0 0] for I/O real time
to be read.
command).
CANL to V
Prewarning
Over-temp
Over-temp
V
shutdown
CSB low
5V-can_
Thermal
RxD low
V
>100ms
DD
V
>2ms
LIN 1
LIN 2
FWU
I/O-2
DD
bit 4
state
UV
id4
DD
4
temp
low
_
DD
V
over-current
INT service
V SUP2-UV
DD
RxD1 low
RxD2 low
Rxd high
5V-can_
CANL to
Timeout
V
GND
DD
bit 3
low RST
id3
3
UV
SERIAL PERIPHERAL INTERFACE
V SUP1-OV I/O-O thermal
Low Power
I/O-1 state
V
RxD1 high
RxD2 high
(<100ms)
TxD dom
V
V
CANH to
R
RST low
>100ms
DD
voltage
SENSE
DD
ST
V
bit 2
low
id2
BAT
2
_low
Over-
OFF
_
CANH to V
V
TxD1 dom
TxD2 dom
Bus Dom
AUX
multiple
request
voltage
voltage
Resets
Under-
V
V
batfail
clamp
Reset
bit 1
SUP
SUP
id1
1
_over-
_
_
DD
Vddon mode
W/D refresh
I
CAN Over-
dom clamp
dom clamp
mode 50%
I/O-0 state
NORMAL
W/D flash
Hardware
DD
CANH to
LIN1 bus
LIN2 bus
I
DD
current
Debug
Leave
failure
mode
GND
bit 0
-OC-LP
id0
-OC-
FLAGS
0
-
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