mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 50

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mc33905s

Manufacturer Part Number
mc33905s
Description
System Basis Chip Gen2 With High Speed Can And Lin Interface
Manufacturer
Freescale Semiconductor, Inc
Datasheet
VBAT, and internal ECU 5.0 V. Several comparators are
implemented on CANH and CANL lines. These comparators
Table 8. Failure Detection Truth Table
DETECTION PRINCIPLE
shorted to GND, VDD (5V), or VBAT, the voltage at the other
line follows the shorted line, due to the bus termination
resistance. For example: if CANL is shorted to GND, the
CANL voltage is zero, the CANH voltage measured by the Hg
comparator is also close to zero.
VBAT is possible. However, it is not possible with the above
implementation to distinguish which of the CANL or CANH
lines are shorted to GND or VBAT. A complete diagnostic is
possible once the driver is turned on, and in the dominant
state.
Number of Samples for Proper Failure Detection
recessive and dominant states to properly recognize the bus
failure. The error will be fully detected after 5 cycles of the
recessive-dominant states. As long as the failure detection
50
33904/5
CAN INTERFACE
CAN BUS FAULT DIAGNOSTIC
Failure Description
The device includes diagnostic of bus short-circuit to GND,
The following table indicates the state of the comparators in case of a bus failure, and depending upon the driver state.
In the recessive state, if one of the two bus lines are
In the recessive state, the failure detection to GND or
The failure detector requires at least one cycle of the
CANH to VBAT
CANL to VBAT
CANH to GND
CANL to GND
CANH to 5.0V
CANL to 5.0V
No failure
No failure
No failure
Lb (threshold V
L5 (threshold V
Lg (threshold 1.75V)
Figure 32. CAN Bus Simplified Structure Truth Table for Failure Detection
Diag
TX
1
0
0
0
1
1
0
1
1
SUP
DD
Logic
Driver Recessive State
-0.43V)
-2.0V)
Lg
Hg
CAN BUS FAULT DIAGNOSTIC
L5
H5
Hb
Lb
Vrg
Vrg
Vrvb
Vr5
Vr5
H5 (threshold V
Vrvb
Hb (threshold V
Hg (threshold 1.75V)
V
DD
CANH
1
0
0
0
1
1
0
1
1
CANL
SUP
DD
-0.43V)
-2.0V)
monitor the bus level in the recessive and dominant states.
The information is then managed by a logic circuitry to
properly determine the failure and report it.
circuitry has not detected the same error for 5 recessive-
dominant cycles, the error is not reported.
BUS CLAMPING DETECTION
than (T
reported in the SPI.
shorted to a high-voltage. In this case current will flow from
the high-voltage short circuit through the bus termination
resistors (60Ω) and then in the SPLIT pin (if used) and in the
device CANH and CANL input resistors, which are terminated
to internal 2.5V biasing or to GND (Sleep Mode).
of nodes, usage of the SPLIT pin, R
Mode state (Sleep or Active) the voltage across the bus
termination can be sufficient to create a positive dominant
voltage between CANH and CANL, and RXD pin will be low.
This would prevent start of any CAN communication, and
If the bus is detected to be in dominant for a time longer
Such condition could occur in case the CANH line is
Depending upon the high-voltage short-circuit, the number
CANH dominant level (3.6V)
CANL dominant level (1.4V)
DOM
L5 (threshold V
Lb (threshold V
Recessive level (2.5V)
Lg (threshold 1.75V)
), the bus failure flag is set and the error is
V RVB (V SUP -2.0V)
V R5 (V DD -.43V)
V BAT (12-14V)
V RG (1.75V)
GND (0.0V)
0
0
0
0
1
0
0
1
0
V DD (5.0V)
SUP
DD
Analog Integrated Circuit Device Data
Driver Dominant State
-0.43V)
-2.0V)
Freescale Semiconductor
IN
H5 (threshold V
Hb (threshold V
Hg (threshold 1.75V)
actual resistor and
1
1
0
0
1
1
0
1
1
SUP
DD
-0.43V)
-2.0V)

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