mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 35

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

“SECURED SPI” DESCRIPTION:
on MISO an unpredictable “random code”. Software must
perform a logical change on the code and return it to the
device with the new SPI command to perform the desired
action.
secured procedure and can be read back at any time.
following transitions:
IN NORMAL REQUEST MODE
watchdog configuration before the end of the normal request
time out period. This period is reset to a long (256ms) after
power on and when BATFAIL is set.
out period which can be used after wake-up from LP Vdd on
mode.
256ms, in order to allow for a complete software initialization,
similar to a device power up.
”timeout” only and can be triggered/served any time within
the period.
WATCHDOG TYPE SELECTION
or Advance.
Mode, after device power up when the Batfail flag is set.
Configuration is done via the SPI. Then the watchdog mode
selection content is locked and can be changed only via a
secured SPI procedure.
Window Watchdog Operation
The watchdog period selection can be kept (SPI is selectable
in INIT Mode), while the device enters into Low Power V
ON Mode. The watchdog period is reset to the default long
period after BATFAIL.
A refresh must be done in the open window of the period,
which starts at 50% of the selected period and ends at the
end of the period.
before end of period, a reset has occurred. The device enters
into Reset Mode.
Analog Integrated Circuit Device Data
Freescale Semiconductor
A request is done by a SPI command, the device provide
The “random code” is different at every exercise of the
The secured SPI uses the Special MODE register for the
- from Normal mode to INT mode
In Normal Request Mode, the device expects to receive a
The device can be configured to a different (shorter) time
After a software watchdog reset, the value is restored to
In Normal Request Mode the watchdog operation is
Two different watchdog modes are implemented: Window
The selection of “Window” or “Advance” is done in INIT
The window watchdog is available in Normal Mode only.
The period and the refresh of watchdog is done by the SPI.
If the watchdog is triggered before 50%, or not triggered
WATCHDOG OPERATION
MODE CHANGE
DD
watchdog” is selected.
CHANGING OF DEVICE CRITICAL PARAMETERS
device power on only, while the batfail flag is set in the INIT
Mode. If a change is required while device is no longer in INIT
mode, device must be set back in INIT mode using the “SPI
secure” procedure.
Watchdog in Debug Mode
pin), the watchdog continues to operate but does not affect
the device operation by asserting a reset. For the user,
operation appears without the watchdog.
watchdog period starts at the end of the SPI command.
10V), the device enters into Reset Mode.
Watchdog in Flash Mode
a long time out period. Watchdog is timeout only and an INT
pulse can be generated at 50% of the time window.
Advance Watchdog Operation
the refresh of the watchdog must be done using a random
number and with 1, 2, or 4 SPI commands. The number for
the SPI command is selected in INIT mode.
and then must return the random byte inverted to clear the
watchdog. The random byte write can be performed in 1, 2,
or 4 different SPI commands.
include 4 of the 8 bits of the inverted random byte. The
second command must include the next 4 bits. This complete
the watchdog refresh.
include 2 of the 8 bits of the inverted random byte. The
second command must include the next 2 bits, the 3rd
command the next 2, and the last command, the last 2. This
complete the watchdog refresh.
send first. The latest SPI command needs to be done inside
the open window time frame, if window watchdog is selected.
- from Normal mode to FLASH mode
- from Normal mode to RESET mode (reset request).
“Random code” is also used when the “advance
Some critical parameters are configured one time at
When the device is in Debug Mode (entered via the DBG
When debug is left by software (SPI mode reg) the
When debug mode is left by hardware (DBG pin below 8-
During flash mode operation, the watchdog can be set to
When the Advance watchdog is selected (at INIT Mode),
The software must read a random byte from the device,
If 1 command is selected, all 8 bits are written at once.
If 2 commands are selected, first write command must
If 4 commands are selected, the first write command must
When multiple writes are used, the most significant bits are
FUNCTIONAL DEVICE OPERATION
MODE CHANGE
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