mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 53

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

bus applications.
includes as well as a fast baud rate for test and programming
modes. It has excellent ESD robustness and immunity
against disturbance, and radiated emission performance. It
has safe behavior in case of a LIN bus short-to-ground, or a
LIN bus leakage during low power mode.
POWER SUPPLY PIN (VSUP)
interface. To avoid a false bus message, an under-voltage on
V
V
GROUND PIN (GND)
LIN interface do not have significant current consumption on
the LIN bus pin when in the recessive state.
LIN BUS PIN (LIN1, LIN2)
transmitter and receiver. It is suited for automotive bus
systems, and is compliant to the LIN bus specification 2.1 and
SAEJ2602-2.
Driver Characteristics
current thermal shutdown. An internal pull-up resistor with a
serial diode structure is integrated so no external pull-up
components are required for the application in a slave node.
An additional pull-up resistor of 1.0 kΩ must be added when
the device is used in the master node. The 1.0 kΩ pull resistor
can connected to LIN term or to ECU battery supply.
receiver and LIN disable modes.
TRANSMIT RECEIVE
information.
timing are compatible with LIN protocol specification 2.1.
timing are compatible with J2602-2.
Analog Integrated Circuit Device Data
Freescale Semiconductor
SUP
SUP
The physical interface is dedicated to automotive LIN sub-
The interface has 20kbps and 10kbps baud rates, and
Digital inputs are related to device Vdd terminal.
The VSUP-2 terminal is the supply pin for the LIN
In case of a ground disconnection at the module level, the
The LIN terminal represents the single-wire bus
The LIN interface is only active during Normal mode.
The LIN driver is a low side MOSFET with internal over-
The LIN interface have two operational modes, Transmit
In the TxRx mode, the LIN bus can transmit and receive
When the 20kbps baud rate is selected, the slew rate and
When the 10kbps baud rate is selected, the slew rate and
disables the transmission path (from TXD to LIN) when
falls below 6.1 V.
LIN INTERFACE DESCRIPTION
LIN OPERATIONAL MODES
LIN BLOCK
line to V
disconnection.
which are selected by SPI.
Receiver Characteristics
Vsup2 voltage.
enters into a recessive state even if communication is sent on
TXD.
threshold, the transceiver and receiver are disabled. When
the temperature falls below the over temperature threshold,
LIN driver and receiver will be automatically enabled.
DATA INPUT PIN (TXDL1, TXDL2)
control the state of the LIN output. When TXDL is LOW
(dominant), LIN output is LOW. When TXDL is HIGH
(recessive), the LIN output transistor is turned OFF.
force the recessive state if the input pin is left floating.
LIN transmitter goes automatically in recessive state. This is
reported by flag in LIN register.
DATA OUTPUT PIN (RXDL1, RXDL2)
the state of the LIN bus voltage.
RXD, LIN LOW (dominant) is reported by a low voltage on
RXD.
timing are much faster than the above specification and allow
fast data transition.
SLEEP MODE
disabled. Supply current for LIN block from V
(typ 3uA). LIN bus is monitor to detect wake-up event. In the
Sleep Mode, the internal 725 kOhm pull-up resistor is
connected and the 30 kOhm disconnected.
The LIN pin exhibits no reverse current from the LIN bus
The transmitter has a 20 kbps, 10 kbps and fast baud rate,
The receiver thresholds are ratiometric with the device
If the Vsup2 voltage goes below typ 6.1V, the LIN bus
If LIN driver temperature reached over temperature
The TXDl1 (TXDL2) input pin is the MCU interface to
This pin has an internal pull-up current source to Vdd to
If the pin stays low (dominant sate) more than t
The RXDl output pin is the MCU interface, which reports
LIN HIGH (recessive) is reported by a high voltage on
When the fast baud rate is selected, the slew rate and
This mode is selected by SPI, and the transmission path is
SUP
, even in the event of a GND shift or V
LIN INTERFACE DESCRIPTION
SUP2
TXDDOM
LIN BLOCK
is very low
SUP
33904/5
, the
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