mpc82g516a Megawin Technology, mpc82g516a Datasheet - Page 46

• Manufacturer Part Number: mpc82g516a
• Description: 8-bit Microcontroller
• Manufacturer: Megawin Technology

11.2.1 Capture Mode
In the capture mode there are two options selected by bit EXEN2 in T2CON. If EXEN2=0, Timer 2 is a 16-bit
timer or counter which, upon overflow, sets bit TF2- the Timer 2 overflow flag. This bit can then be used to
generate an interrupt (by enabling the Timer 2 interrupt bit in the IE register). If EXEN2=1, Timer 2 still does the
above, but with the added feature that a 1-to-0 transition at external input T2EX causes the current value in the
Timer 2 registers, TH2 and TL2, to be captured into registers RCAP2H and RCAP2L, respectively. In addition,
the transition at T2EX causes bit EXF2 in T2CON to be set, and the EXF2 bit (like TF2) can generate an interrupt
(which vectors to the same location as Timer 2 overflow interrupt). The capture mode is illustrated in Figure 11-6.
(There is no reload value for TL2 and TH2 in this mode. Even when a capture event occurs from T2EX, the
counter keeps on counting T2EX pin transitions or Fosc/12 pulses).
Figure 11-6. Timer 2 in Capture Mode
11.2.2 Auto-Reload Mode (Up or Down Counter)
In the 16-bit auto-reload mode, Timer 2 can be configured as either a timer or counter (C/-T2 in T2CON), then
programmed to count up or down. The counting direction is determined by bit DCEN (Down Counter Enable)
which is located in the T2MOD register. After reset, DCEN=0 which means Timer 2 will default to counting up. If
DCEN is set, Timer 2 can count up or down depending on the value of the T2EX pin.
Figure 11-7 shows DCEN=0, which enables Timer 2 to count up automatically. In this mode there are two options
selected by bit EXEN2 in T2CON register. If EXEN2=0, then Timer 2 counts up to 0FFFFH and sets the TF2
(Overflow Flag) bit upon overflow. This causes the Timer 2 registers to be reloaded with the 16-bit value in
RCAP2L and RCAP2H. The values in RCAP2L and RCAP2H are preset by software. If EXEN2=1, then a 16-bit
reload can be triggered either by an overflow or by a 1-to-0 transition at input T2EX. This transition also sets the
EXF2 bit. The Timer 2 interrupt, if enabled, can be generated when either TF2 or EXF2 are 1.
Figure 11-8 shows DCEN=1, which enables Timer 2 to count up or down. This mode allows pin T2EX to control
the counting direction. When a logic 1 is applied at pin T2EX, Timer 2 will count up. Timer 2 will overflow at
0FFFFH and set the TF2 flag, which can then generate an interrupt if the interrupt is enabled. This overflow also
causes the 16-bit value in RCAP2L and RCAP2H to be reloaded into the timer registers TL2 and TH2. A logic 0
applied to pin T2EX causes Timer 2 to count down. The timer will underflow when TL2 and TH2 become equal to
the value stored in RCAP2L and RCAP2H. This underflow sets the TF2 flag and causes 0FFFFH to be reloaded
into the timer registers TL2 and TH2.
The external flag EXF2 toggles when Timer 2 underflows or overflows. This EXF2 bit can be used as a 17th bit of
resolution if needed. The EXF2 flag does not generate an interrupt in this mode.
MEGAWIN
T2EX Pin
* Fosc is the system clock.
(P1.1)
T2 Pin
(P1.0)
Fosc
Transition
Detector
12
"0"
"1"
C/-T2
EXEN2
TR2
Capture
MPC82G516A Data Sheet
RCAP2L RCAP2H
(8 Bits)
TL2
(8 Bits)
TH2
Overflow
EXF2
TF2
Timer 2
Interrupt
46