mg82fx564 Megawin Technology, mg82fx564 Datasheet

mg82fx564

Manufacturer Part Number

mg82fx564

Description

8-bit Microcontroller

Manufacturer

Megawin Technology

Datasheet

1.MG82FX564.pdf (130 pages)

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10. Configurable I/O Ports................................................................................ 30

This document contains information on a new product under development by Megawin. Megawin reserves the right to change or

discontinue this product without notice.

Features ....................................................................................................... 5

Description ................................................................................................... 7

Order information ......................................................................................... 7

Pin Description ............................................................................................. 8

Block Diagram............................................................................................ 12

Special Function Register .......................................................................... 13

Memory Organization................................................................................. 16

8051 CPU Description................................................................................ 26

Dual Data Pointer Register (DPTR) ........................................................... 29

4.1.

4.2.

6.1.

6.2.

7.1.

7.2.

7.3.

7.4.

8.1.

8.2.

8.3.

8.4.

10.1. IO Structure......................................................................................................... 30

10.2. I/O Port Register ................................................................................................. 32

7.4.1. Multiplexed Mode for 8-bit MOVX................................................................................. 23

7.4.2. Multiplexed Mode for 16-bit MOVX............................................................................... 24

7.4.3. No Address Phase Mode for MOVX............................................................................. 25

10.1.1. Quasi-Bidirectional IO Structure ................................................................................... 30

10.1.2. Push-Pull Output Structure........................................................................................... 31

10.1.3. Input-Only (High Impedance Input) Structure............................................................... 31

10.1.4. Open-Drain Output Structure ....................................................................................... 32

10.2.1. Port 0 Register ............................................................................................................. 33

10.2.2. Port 1 Register ............................................................................................................. 33

10.2.3. Port 2 Register ............................................................................................................. 34

10.2.4. Port 3 Register ............................................................................................................. 34

10.2.5. Port 4 Register ............................................................................................................. 35

10.2.6. Port 5 Register ............................................................................................................. 35

Pin Definition......................................................................................................... 8

Package Configuration........................................................................................ 10

SFR Map............................................................................................................. 13

SFR Bit Assignment ............................................................................................ 14

On-Chip Program Flash ...................................................................................... 16

On-Chip Data RAM ............................................................................................. 17

On-chip expanded RAM (XRAM) ........................................................................ 21

External Data Memory access ............................................................................ 22

CPU Register ...................................................................................................... 26

CPU Timing......................................................................................................... 27

CPU Addressing Mode........................................................................................ 27

Declaration Identifiers in a C51-Compiler............................................................ 28

Content

8-bit microcontroller

MG82Fx564

2010/11 version 1.1

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