mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 65

• Manufacturer Part Number: mc68hc908bd48
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.3.2 Configuration Register 1
MC68HC908BD48
Freescale Semiconductor
NOTE:
—
Rev. 2.1
Address:
Reset:
SSREC — Short Stop Recovery Bit
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
COPRS — COP Rate Select Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Read:
Write:
SSREC enables the CPU to exit stop mode with a delay of 32
OSCXCLK cycles instead of a 4096-OSCXCLK cycle delay.
COPRS selects the COP timeout period. Reset clears COPRS.
Section 19. Computer Operating Properly
STOP enables the STOP instruction.
COPD disables the COP module.
Operating Properly
1 = Stop mode recovery after 32 OSCXCLK cycles
0 = Stop mode recovery after 4096 OSCXCLKC cycles
1 = COP timeout period = 2
0 = COP timeout period = 2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
$001F
Bit 7
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
Configuration Register (CONFIG)
= Unimplemented
6
0
0
(COP).)
5
0
0
13
18
4
0
0
– 2
– 2
(See Section 19. Computer
4
4
SSREC
CGMXCLK cycles
CGMXCLK cycles
3
0
Configuration Register (CONFIG)
(COP).)
COPRS
2
0
STOP
1
0
Data Sheet
COPD
Bit 0
(See
0
65